56results about How to "Increase the current switch ratio" patented technology

The invention discloses a nano-wire field effect transistor comprising a gate electrode, a source region, a drain region, a central region and a gate dielectric layer. The central region is in the core-shell structures which are coaxial; the gate dielectric layer fully surrounds the central region; the gate electrode fully surrounds the gate dielectric layer; the source region and the drain region are respectively arranged on two sides of the central region; the core structure of the central region is made from insulating material, and the shell structure of the central region is made from semiconductor material; the doping type and the doping concentration of the semiconductor material of the shell structure of the central region are adjustable; the lengths of both the core structure andthe shell structure and the radii of both the core structure and the shell structure are adjustable; and the materials of the gate dielectric layer, the gate electrode, the source region and the drain region are adjustable. Due to the adoption of the insulating core structure, the off-current of the traditional nano-wire transistor can be reduced effectively, and the current on-off ratio of the devices can be increased. The threshold voltage shifting and the drain induced barrier lowering of the nano-wire field effect transistor are less affected by the short channel effect, and the size reducing performance of the nano-wire field effect transistor is more excellent.

The invention discloses an asymmetrical reconfigurable field effect transistor. The transistor comprises a channel, a drain arranged at one end of the channel, a source extended to the inside of the channel at the other end of the channel, and a drain arranged at one end of the channel. The gate oxide on the outside, the control gate and the polarity gate respectively arranged on the source and drain terminals and outside the gate oxide, respectively arranged outside the two ends of the channel, are used for the control gate, the polarity gate The side wall electrically isolating the source and the drain, and the gate isolation arranged outside the gate oxide for isolating the control gate and the polarity gate. In the present invention, the contact area between the source end extending into the channel and the nanowire channel is larger, thereby increasing the tunneling area of ​​carriers and increasing the turn-on current. When it is turned off, the drain structure is the same as the non-overlapping area of ​​the general RFET drain structure, and the leakage current remains basically unchanged, so the current switching ratio is improved, and the logic gate current is shortened while keeping the static power consumption unchanged. operation delay time.

The invention belongs to the technical field of display devices, and discloses a neodymium indium zinc oxide thin film transistor and a preparation method thereof. The thin film transistor is composed of a substrate, a metal gate, a gate insulating layer, an Nd-IZO semiconductor active layer, an oxide insulator passivation layer and metal source and drain electrodes. In the present invention, a certain proportion of Nd element doping is introduced into the IZO semiconductor target, and the Nd-IZO active layer film with high carrier concentration is deposited by a room temperature sputtering process, combined with ultra-thin Al 2 o 3 The passivation layer controls the carrier transport under the electric field, which can optimize the electrical properties of the device to obtain high-performance thin film transistors.

The invention provides an asymmetric van der Waals heterojunction device, comprising graphene nanosheets, hexagonal boron nitride nanosheets, molybdenum disulfide nanosheets, and molybdenum ditelluride nanosheets arranged sequentially from bottom to top; the graphene The nanosheets overlap with the hexagonal boron nitride nanosheets, molybdenum disulfide nanosheets, and molybdenum ditelluride nanosheets; Regions do not overlap with MoTe nanosheets. The invention also provides the preparation and application of the asymmetric van der Waals heterojunction device. The asymmetric van der Waals heterojunction device of the invention can realize the organic unity of ultra-high performance and multiple functions. When operating as a transistor, the device exhibits ultrahigh current switching ratio, ultrasmall subthreshold swing, and pronounced negative transconductance behavior. When operating as a rectifier, the device exhibits an ultrahigh current rectification ratio. When operating as a memory, the device exhibits ultra-high erase / write current ratio and current rectification ratio.

The invention provides a van der Waals heterojunction device, comprising a base, a molybdenum ditelluride nanosheet, a molybdenum disulfide nanosheet and a metal electrode sequentially arranged from bottom to top, and the cross-sectional area of ​​the molybdenum ditelluride nanosheet is larger than The cross-sectional area of ​​the molybdenum disulfide nanosheets. The van der Waals heterojunction device of the invention can realize the dynamic adjustment of the conduction polarity. Under different bias conditions, field-effect transistors based on this van der Waals heterojunction device can achieve bipolar and N-type conduction polarity, respectively, and exhibit an ultrahigh current switching ratio (~10 7 ), current rectification ratio (~10 6 ) and excellent photovoltaic performance, which can be applied in new two-dimensional electronic and optoelectronic devices.