Ambipolar inverter device structure and manufacturing method thereof
A technology of component structure and manufacturing method, applied in the field of dual carrier inverter component structure and its manufacturing, can solve the problems of material property damage, occupation area, complex process and the like
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no. 1 example
[0106] Figure 1A-1D It is a schematic cross-sectional view of the manufacturing method of the bicarrier inverter assembly structure according to the first embodiment of the present invention.
[0107] Please refer to Figure 1A , forming an electrode 102 a and an electrode 102 b separated from each other on the substrate 100 . The substrate 100 can be a rigid substrate or a flexible substrate. Materials for rigid substrates are, for example, glass, quartz or silicon wafers. The material of the flexible substrate is, for example, plastic such as acrylic, metal foil or paper. The electrode 102 a and the electrode 102 b are formed by, for example, first forming an electrode layer (not shown) on the substrate 100 , and then patterning the electrode layer by using lithography and etching processes. The material of the electrode layer is, for example, gold, silver, copper, aluminum, molybdenum, chromium, etc. or alloys thereof. The method for forming the electrode layer include...
no. 2 example
[0125] Figure 2A-2B It is a schematic cross-sectional view of the manufacturing method of the bicarrier inverter assembly structure according to the second embodiment of the present invention. The bipolar inverter assembly structure 20 of the second embodiment is similar to the bipolar inverter assembly structure 10 of the first embodiment, the differences will be described below, and the similarities will not be repeated.
[0126] First, please refer to Figure 2A , forming a gate 202 on the substrate 200 . Then, a dielectric layer 204 covering the gate 202 is formed on the substrate 200 . Next, an electrode 206 a and an electrode 206 b are formed on the dielectric layer 204 . Materials and formation methods of the gate 202, dielectric layer 204, electrode 206a, and electrode 206b of the second embodiment are similar to those of the gate 118, dielectric layer 116, electrode 102a, and electrode 102b of the first embodiment, and are not repeated here. repeat.
[0127] Aft...
example 1
[0137] The substrate is a P-type silicon wafer (30-60Ω-cm, crystal plane). Then, 200nm of silicon oxide is formed on the substrate as a dielectric layer. Then, two silver electrodes are formed on the dielectric layer. Then, on the dielectric layer and the silver electrode, vapor-deposit as electron blocking layer m-MTDATA thin film. Afterwards, the substrate was placed in a vacuum chamber and evacuated to 2.5×10 -6 torr, using a boron nitride crucible (BN crucible) to The plating rate of PTCDI-C13 as an N-type organic semiconductor material and pentacene (pentacene) as a P-type organic semiconductor material were vapor-deposited respectively to form a bipolar semiconductor layer. At this time, the film thickness is monitored by a quartz oscillator, and then calibrated by a white light interferometer to form The PTCDI-C13 film and pentacene film. Then, on the bipolar semiconductor layer, vapor-deposit as electron blocking layer m-MTDATA thin film. Note that the s...
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