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19893 results about "Active layer" patented technology

In environments containing permafrost, the active layer is the top layer of soil that thaws during the summer and freezes again during the autumn. In all climates, whether they contain permafrost or not, the temperature in the lower levels of the soil will remain more stable than that at the surface, where the influence of the ambient temperature is greatest. This means that, over many years, the influence of cooling in winter and heating in summer (in temperate climates) will decrease as depth increases.

Semiconductor device, manufacturing method, and electronic device

In a thin film transistor (1), a gate insulating layer (4) is formed on a gate electrode (3) formed on an insulating substrate (2). Formed on the gate insulating layer (4) is a semiconductor layer (5). Formed on the semiconductor layer (5) are a source electrode (6) and a drain electrode (7). A protective layer (8) covers them, so that the semiconductor layer (5) is blocked from an atmosphere. The semiconductor layer (5) (active layer) is made of, e.g., a semiconductor containing polycrystalline ZnO to which, e.g., a group V element is added. The protective layer (8) thus formed causes decrease of a surface level of the semiconductor layer (5). This eliminates a depletion layer spreading therewithin. Accordingly, the ZnO becomes an n-type semiconductor indicating an intrinsic resistance, with the result that too many free electrons are generated. However, the added element works on the ZnO as an accepter impurity, so that the free electrons are reduced. This decreases a gate voltage required for removal of the free electrons, so that the threshold voltage of the thin film transistor (1) becomes on the order of 0V. This allows practical use of a semiconductor device which has an active layer made of zinc oxide and which includes an protective layer for blocking the active layer from an atmosphere.
Owner:SHARP KK +2

Field-effect transistor including transparent oxide and light-shielding member, and display utilizing the transistor

A field-effect transistor includes a substrate, a source electrode, a drain electrode, a gate electrode, a gate-insulating film, and an active layer. The active layer contains an oxide having a transmittance of 70% or more in the wavelength range of 400 to 800 nm. A light-shielding member is provided as a light-shielding structure for the active layer, for example, on the bottom face of the substrate.
Owner:CANON KK

Display

An active matrix display comprising a light control device and a field effect transistor for driving the light control device. The active layer of the field effect transistor comprises an amorphous.
Owner:CANON KK +2

Semiconductor device including active layer made of zinc oxide with controlled orientations and manufacturing method thereof

A semiconductor device includes an oxide semiconductor thin film layer primarily including zinc oxide having at least one orientation other than (002) orientation. The zinc oxide may have a mixed orientation including (002) orientation and (101) orientation. Alternatively, the zinc oxide may have a mixed orientation including (100) orientation and (101) orientation.
Owner:KOICHI IND PROMOTION CENT +1

Semiconductor device in which zinc oxide is used as a semiconductor material and method for manufacturing the semiconductor device

A semiconductor device having excellent crystallinity and excellent electric characteristics includes a ZnO thin film having excellent surface smoothness. ZnO-based thin films (an n-type contact layer, an n-type clad layer, an active layer, a p-type clad layer, and a p-type contact layer) primarily including ZnO are formed sequentially by an ECR sputtering method or other suitable method on a zinc-polar surface of a ZnO substrate. A transparent electrode and a p-side electrode are formed by an evaporation method or other suitable method on a surface of the p-type contact layer, and an n-side electrode is formed on an oxygen-polar surface of the ZnO substrate.
Owner:MURATA MFG CO LTD

Group III nitride photonic devices on silicon carbide substrates with conductive buffer interlayer structure

An optoelectronic device with a Group III Nitride active layer is disclosed that comprises a silicon carbide substrate; an optoelectronic diode with a Group III nitride active layer; a buffer structure selected from the group consisting of gallium nitride and indium gallium nitride between the silicon carbide substrate and the optoelectronic diode; and a stress-absorbing structure comprising a plurality of predetermined stress-relieving areas within the crystal structure of the buffer structure, so that stress-induced cracking that occurs in the buffer structure occurs at predetermined areas rather than elsewhere in the buffer structure.
Owner:CREE INC

Thin film transistor, method of manufacturing the same and flat panel display device having the same

A thin film transistor (TFT) using an oxide semiconductor as an active layer, a method of manufacturing the TFT, and a flat panel display device having the TFT include a gate electrode formed on a substrate; an active layer made of an oxide semiconductor and insulated from the gate electrode by a gate insulating layer; source and drain electrodes coupled to the active layer; and an interfacial stability layer formed on one or both surfaces of the active layer. In the TFT, the interfacial stability layer is formed of an oxide having a band gap of 3.0 to 8.0 eV. Since the interfacial stability layer has the same characteristic as a gate insulating layer and a passivation layer, chemically high interface stability is maintained. Since the interfacial stability layer has a band gap equal to or greater than that of the active layer, charge trapping is physically prevented.
Owner:SAMSUNG DISPLAY CO LTD

METHOD FOR FABRICATION OF SEMIPOLAR (Al, In, Ga, B)N BASED LIGHT EMITTING DIODES

A yellow Light Emitting Diode (LED) with a peak emission wavelength in the range 560-580 nm is disclosed. The LED is grown on one or more III-nitride-based semipolar planes and an active layer of the LED is composed of indium (In) containing single or multi-quantum well structures. The LED quantum wells have a thickness in the range 2-7 nm. A multi-color LED or white LED comprised of at least one semipolar yellow LED is also disclosed.
Owner:RGT UNIV OF CALIFORNIA

Method of manufacturing surface textured high-efficiency radiating devices and devices obtained therefrom

A device for emitting radiation at a predetermined wavelength is presented. This device has a cavity with an active layer in which said radiation is generated by charge carrier recombination. The edges of the device define the region or space for radiation and / or charge carrier confinement. At least one of the edges of this cavity has a substantially random grating structure. The edge of the device has substantially random grating structure and can extend as at least one edge of a waveguide forming part of this radiation emitting device. The radiation emitting device of the present invention can have a cavity comprising a radiation confinement space that includes confinement features for the charge carriers confining the charge carriers to a subspace being smaller than the radiation confinement space within the cavity. The emitting device can comprise at least two edges forming, in cross-section, a substantially triangular shape. The angle between these two edges is smaller than 45°. At least one of the two edges has a transparent portion. the devices according to the present invention can be arranged in arrays.
Owner:SIGNIFY HLDG BV

Thin film transistor and method of producing thin film transistor

The invention provides a thin film transistor comprising an active layer, the active layer comprising an IGZO-based oxide material, the IGZO-based oxide material being represented by a composition formula of In2-xGaxZnO4-δ, where 0.75<x<1.10 and 0<δ≦1.29161×exp(−x / 0.11802)+0.00153 and being formed from a single phase of IGZO having a crystal structure of YbFe2O4, and a method of producing the thin film transistor.
Owner:SAMSUNG DISPLAY CO LTD

Semiconductor light-emitting device and semiconductor light-emitting device

A semiconductor light-emitting element is provided which has a structure that does not complicate a fabrication process, can be formed in high precision and does not invite any degradation of crystallinity. A light-emitting element is formed, which includes a selective crystal growth layer formed by selectively growing a compound semiconductor of a Wurtzite type, a clad layer of a first conduction type, an active layer and a clad layer of a second conduction type, which are formed on the selective crystal growth layer wherein the active layer is formed so that the active layer extends in parallel to different crystal planes, the active layer is larger in size than a diffusion length of a constituent atom of a mixed crystal, or the active layer has a difference in at least one of a composition and a thickness thereof, thereby forming the active layer having a number of light-emitting wavelength regions whose emission wavelengths differ from one another. The element is so arranged that an electric current or currents are chargeable into the number of light-emitting wavelength regions. Because of the structure based on the selective growth, the band gap energy varies within the same active layer, thereby forming an element or device in high precision without complicating a fabrication process.
Owner:SAMSUNG ELECTRONICS CO LTD

Wafer-level light emitting diode package and method of fabricating the same

Exemplary embodiments of the present invention provide a wafer-level light emitting diode (LED) package and a method of fabricating the same. The LED package includes a semiconductor stack including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer; a plurality of contact holes arranged in the second conductive type semiconductor layer and the active layer, the contact holes exposing the first conductive type semiconductor layer; a first bump arranged on a first side of the semiconductor stack, the first bump being electrically connected to the first conductive type semiconductor layer via the plurality of contact holes; a second bump arranged on the first side of the semiconductor stack, the second bump being electrically connected to the second conductive type semiconductor layer; and a protective insulation layer covering a sidewall of the semiconductor stack.
Owner:SEOUL SEMICONDUCTOR

Semiconductor light emitting device integral type semiconductor light emitting unit image display unit and illuminating unit

A semiconductor light emitting device with improved luminous efficiency is provided. An underlying n-type GaN layer is grown on a sapphire substrate, and a growth mask made from SiO2 film or the like is formed on the underlying n-type GaN layer. An n-type GaN layer having a hexagonal pyramid shape is selectively grown on a portion, exposed from an opening of the growth mask, of the underlying n-type GaN layer. The growth mask is removed by etching, and then an active layer and a p-type GaN layer are sequentially grown on the entire substrate so as to cover the hexagonal pyramid shaped n-type GaN layer, to form a light emitting device. An n-side electrode and a p-side electrode are then formed.
Owner:SAMSUNG ELECTRONICS CO LTD

Method of making an organic thin film transistor

A process for fabricating thin film transistors in which the active layer is an organic semiconducting material with a carrier mobility greater than 10-3 cm2 / Vs and a conductivity less than about 10-6 S / cm at 20 DEG C. is disclosed. The organic semiconducting material is a regioregular (3-alkylthiophene) polymer. The organic semiconducting films are formed by applying a solution of the regioregular polymer and a solvent over the substrate. The poly (3-alkylthiophene) films have a preferred orientation in which the thiophene chains has a planar stacking so the polymer backbone is generally parallel to the substrate surface.
Owner:BELL SEMICON LLC +2

Semiconductor light emitting device and fabrication method thereof

A semiconductor light emitting device includes a crystal layer formed on a substrate, the crystal layer having a tilt crystal plane tilted from the principal plane of the substrate, and a first conductive type layer, an active layer, and a second conductive type layer, which are formed on the crystal layer in such a manner as to extend within planes parallel to the tilt crystal plane, wherein the device has a shape formed by removing the apex and its vicinity of the stacked layer structure formed on the substrate. Such a semiconductor light emitting device is excellent in luminous efficiency even if the device has a three-dimensional device structure. The present invention also provides a method of fabricating the above semiconductor light emitting device.
Owner:SAMSUNG ELECTRONICS CO LTD

Low temperature thin film transistor process, device property, and device stability improvement

A method and apparatus for forming a thin film transistor is provided. A gate dielectric layer is formed, which may be a bilayer, the first layer deposited at a low rate and the second deposited at a high rate. In some embodiments, the first dielectric layer is a silicon rich silicon nitride layer. An active layer is formed, which may also be a bilayer, the first active layer deposited at a low rate and the second at a high rate. The thin film transistors described herein have superior mobility and stability under stress.
Owner:APPLIED MATERIALS INC

Power IC having SOI structure

The present invention relates in general to power ICs, etc. having the SOI structure, and more specifically to the structure in which an SOI substrate comprises a base substrate, an SOI oxide film formed on the base substrate, and active layers formed on the SOI oxide film, and also integrates on itself power devices and the corresponding control elements monolithically. Between this base substrate and this SOI oxide film is formed heavily-doped semiconductor regions having a conductivity type opposite to that of this base substrate. Hence, the junction capacitance between the base substrate and the heavily-doped semiconductor regions decreases an actual capacitance between the base substrate and the active layer so that to inhibit or prevent inversion layers from being formed at the bottom of the active layers.
Owner:KK TOSHIBA
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