80056 results about "Transistor" patented technology

A transistor is provided, which is entirely and partially transparent by the use of a transparent channel layer made of zinc oxide or the like. A channel layer 11 formed of a transparent semiconductor such as zinc oxide ZnO. A transparent electrode is used for all of a source 12, a drain 13 and a gate 14, or a part of them. As the transparent electrode, a transparent conductive material such as conductive ZnO doped with, for example, group III elements is used. As a gate insulating layer 15, a transparent insulative material such as insulative ZnO doped with elements capable of taking a valence of one as a valence number or group V elements is used. If a substrate 16 must be transparent, for example, glass, sapphire, plastic or the like can be used as a transparent material.

The present invention relates to a process of making a zinc-oxide-based thin film semiconductor, for use in a transistor, comprising thin film deposition onto a substrate comprising providing a plurality of gaseous materials comprising at least first, second, and third gaseous materials, wherein the first gaseous material is a zinc-containing volatile material and the second gaseous material is reactive therewith such that when one of the first or second gaseous materials are on the surface of the substrate the other of the first or second gaseous materials will react to deposit a layer of material on the substrate and wherein the third gaseous material is inert with respect to reacting with the first or second gaseous materials.

When a signal inputted to a pixel is erased by setting potentials of a gate terminal and a source terminal of a driving transistor to be equal, a current slightly flows through the driving transistor in some cases, which leads to occur a display defect. The invention provides a display device which improves the yield while suppressing the increase in manufacturing cost. When a potential of a scan line for erasure is raised, a potential of the gate terminal of the driving transistor is raised accordingly. For example, the scan line and the gate terminal of the driving transistor are connected through a rectifying element.

An Organic Light Emitting Display (OLED) and its method of fabrication includes: a transparent substrate; a photochromatic layer formed on a first surface of the transparent substrate; at least one transparent Thin Film Transistor (TFT) formed on a first surface of the transparent substrate, and an organic light emitting device formed on and electrically connected to the transparent TFT.

In the present invention, a thin film transistor is formed on a plastic film substrate (1) having anisotropy of thermal shrinkage rate or coefficient of thermal expansion in in-plane directions of the substrate. A channel is formed such thatthe direction (7) in which the thermal shrinkage rate or the coefficient of thermal expansion of the substrate is largest is nonparallel tothe direction (8) of a current flowing through the channel of the thin film transistor. Then, a thin film transistor having stable and uniform electrical characteristics, which is formed on the plastic film substrate, is provided.

Disclosed is a thin film transistor including a P-type semiconductor layer, and an organic light-emitting display device having the thin film transistor. The present invention provides a thin film transistor including a substrate, a semiconductor layer, and a gate electrode and a source/drain electrode formed on the substrate, wherein the semiconductor layer is composed of P-type ZnO:N layers through a reaction of a mono-nitrogen gas with a zinc precursor, and the ZnO:N layer includes an un-reacted impurity element at a content of 3 at % or less.

A thin film transistor comprises a zinc-oxide-containing semiconductor material. Such transistors can further comprise spaced apart first and second contact means or electrodes in contact with said material. Further disclosed is a process for fabricating a thin film transistor device, wherein the substrate temperature is no more than 300° C. during fabrication.

Apparatus and methods are disclosed for simultaneously tracking multiple finger and palm contacts as hands approach, touch, and slide across a proximity-sensing. compliant, and flexible multi-touch surface. The surface consists of compressible cushion, dielectric, electrode, and circuitry layers. A simple proximity transduction circuit is placed under each electrode to maximize signal-to-noise ratio and to reduce wiring complexity. Such distributed transduction circuitry is economical for large surfaces when implemented with thin-film transistor techniques. Scanning and signal offset removal on an electrode array produces low-noise proximity images. Segmentation processing of each proximity image constructs a group of electrodes corresponding to each distinguishable contact and extracts shape, position and surface proximity features for each group. Groups in successive images which correspond to the same hand contact are linked by a persistent path tracker which also detects individual contact touchdown and liftoff. Combinatorial optimization modules associate each contact's path with a particular fingertip, thumb, or palm of either hand on the basis of biomechanical constraints and contact features. Classification of intuitive hand configurations and motions enables unprecedented integration of typing, resting, pointing, scrolling, 3D manipulation, and handwriting into a versatile, ergonomic computer input device.

An overvoltage output protector is electrically connected to a constant-voltage switching power supply which includes a switching transistor converting a DC voltage obtained by smoothing an AC voltage supplied from an AC power source into a cyclic pulse signal. In the overvoltage output protector, an overvoltage monitor whether a potential of the cyclic pulse signal is a predetermined value or more. A deactivator turns off the switching transistor in a case where the overvoltage monitor judges that the potential of the cyclic pulse signal is the predetermined value or more.

A display pixel unit provides reduced capacitative coupling between a pixel electrode and a source line. The unit includes a transistor, the pixel electrode, and the source line. The source line includes an extension that provides a source for the transistor. A patterned conductive portion is disposed adjacent to the source line.

A motor controller includes a power source unit providing a direct current output, a drive unit including a drive coil, first and second transistor units, a voltage drop component, and a processor. The transistor units are coupled to the power source unit and the drive unit, and enable electricity to flow through the drive coil in a first direction when the first and the second transistor units are in conducting and non-conducting states respectively, and in an opposite second direction when the first and the second transistor units are in non-conducting and conducting states respectively. The voltage drop component has a first end coupled to the drive unit and a grounded second end. The processor is coupled to a junction of the drive unit and the voltage drop component, and provides first and second pulse-width-modulated signals to the first and second transistor units, respectively.

A drive unit for driving a corresponding one of organic EL elements of an active matrix EL display device includes a blanking switch for blanking the video signal stored in a storage capacitor in each frame period before the start of the next frame period. A drive transistor drives a corresponding EL element based on the correct current supplied for this If the video signal is a current signal, a transistor operating as a current-voltage converter is provided

The present invention describes a process for three-dimensional integration of semiconductor devices and a resulting device. The process combines low temperature wafer bonding methods with backside/substrate contact processing methods, preferably with silicon on insulator devices. The present invention utilizes, in an inventive fashion, low temperature bonding processes used for bonded silicon on insulator (SOI) wafer technology. This low temperature bonding technology is adopted for stacking several silicon layers on top of each other and building active transistors and other circuit elements in each one. The back-side/substrate contact processing methods allow the interconnection of the bonded SOI layers.

An image display apparatus comprises a pixel having a drive transistor and a pixel display element which are connected in series between a first power line and a second power line, a holding capacitor connected to a gate electrode of the drive transistor, and a selection transistor connected between a signal line and the gate electrode of the drive transistor. When the selection transistor is turned on, gradation pixel data is written in the holding capacitor from the signal line. The charge of gradation pixel data written in the holding capacitor is discharged for a certain period through the drive transistor, thereafter the charge of the gradation pixel data stored in the holding capacitor is held by floating the gate electrode of the drive transistor.

Provided are a thin film transistor and a method of manufacturing the same. The thin film transistor may include a gate; a channel layer; a source and a drain, the source and the drain being formed of metal; and a metal oxide layer, the metal oxide layer being formed between the channel layer and the source and the drain. The metal oxide layer may have a gradually changing metal content between the channel layer and the source and the drain.

The invention provides a thin film transistor comprising an active layer, the active layer comprising an IGZO-based oxide material, the IGZO-based oxide material being represented by a composition formula of In_2-xGa_xZnO_4-δ, where 0.75<x<1.10 and 0<δ≦1.29161×exp(−x/0.11802)+0.00153 and being formed from a single phase of IGZO having a crystal structure of YbFe₂O₄, and a method of producing the thin film transistor.

Stress of a silicon nitride layer may be enhanced by deposition at higher temperatures. Employing an apparatus that allows heating of a substrate to substantially greater than 400° C. (for example a heater made from ceramic rather than aluminum), the silicon nitride film as-deposited may exhibit enhanced stress allowing for improved performance of the underlying MOS transistor device. In accordance with alternative embodiments, a deposited silicon nitride film is exposed to curing with ultraviolet (UV) radiation at an elevated temperature, thereby helping remove hydrogen from the film and increasing film stress. In accordance with still other embodiments, a silicon nitride film is formed utilizing an integrated process employing a number of deposition/curing cycles to preserve integrity of the film at the sharp corner of the underlying raised feature. Adhesion between successive layers may be promoted by inclusion of a post-UV cure plasma treatment in each cycle.