77881 results about "Integrated circuit" patented technology

A method for patterning a plurality of features in a non-rectangular pattern, such as on an integrated circuit device, includes providing a substrate including a surface with a plurality of elongated protrusions, the elongated protrusions extending in a first direction. A first layer is formed above the surface and above the plurality of elongated protrusions, and patterned with an end cutting mask. The end cutting mask includes two nearly-adjacent patterns with a sub-resolution feature positioned and configured such that when the resulting pattern on the first layer includes the two nearly adjacent patterns and a connection there between. The method further includes cutting ends of the elongated protrusions using the pattern on the first layer.

A method of forming a target pattern includes forming a plurality of lines over a substrate with a first mask and forming a first spacer layer over the substrate, over the plurality of lines, and onto sidewalls of the plurality of lines. The plurality of lines is removed, thereby providing a patterned first spacer layer over the substrate. The method further includes forming a second spacer layer over the substrate, over the patterned first spacer layer, and onto sidewalls of the patterned first spacer layer, and forming a patterned material layer over the second spacer layer with a second mask. Whereby, the patterned material layer and the second spacer layer collectively define a plurality of trenches.

A system and method of tracking medical products provides for associating a group of medical products with a group location based on a group radio frequency identification (RF ID) device signal, where the group includes a first unit and a second unit. The first unit is associated with a first remote location based on a first unit RF ID device signal. The method further provides for associating the second unit with a second remote location based on a second remote location based on a second unit RF ID device signal. The signals uniquely identify the units and the group.

A method for transferring a thin film device on a substrate onto a transfer member, includes a step for forming a separation layer on the substrate, a step for forming a transferred layer including the thin film device on the separation layer, a step for adhering the transferred layer including the thin film device to the transfer member with an adhesive layer therebetween, a step for irradiating the separation layer with light so as to form internal and / or interfacial exfoliation of the separation layer, and a step for detaching the substrate from the separation layer.

An immersion lithographic system 10 comprises an optical surface 51, an immersion fluid 60 contacting at least a portion of the optical surface, and a semiconductor structure 80 having a topmost photoresist layer 70 having a thickness of less than about 5000 angstroms, wherein a portion of the photoresist is in contact with the immersion fluid. Further, a method for illuminating a semiconductor structure 80 having a topmost photoresist layer 70 with a thickness of less than about 5000 angstroms, comprising introducing an immersion fluid 60 into a space between an optical surface 51 and the photoresist layer, and directing light preferably with a wavelength of less than about 450 nm through the immersion fluid and onto the photoresist.

Improvements in the fabrication of integrated circuits are driven by the decrease of the size of the features printed on the wafers. Current lithography techniques limits have been extended through the use of phase-shifting masks, off-axis illumination, and proximity effect correction. More recently, liquid immersion lithography has been proposed as a way to extend even further the limits of optical lithography. This invention described a methodology based on contact printing using a projection lens to define the image of the mask onto the wafer. As the imaging is performed in a solid material, larger refractive indices can be obtained and the resolution of the imaging system can be increased.

An inherently tuned antenna has a circuit for harvesting energy transmitted in space and includes portions that are structured to provide regenerative feedback into the antenna to produce an inherently tuned antenna which has an effective area substantially greater than its physical area. The inherently tuned antenna includes inherent distributive inductive, inherent distributive capacitive and inherent distributive resistive elements which cause the antenna to resonate responsive to receipt of energy at a particular frequency and to provide feedback to regenerate the antenna. The circuit may be provided on an integrated circuit chip. An associated method is provided.

Disclosed are bioluminescent bioreporter integrated circuit devices that detect selected analytes in fluids when implanted in the body of an animal. The device comprises a bioreporter that has been genetically engineered to contain a nucleic acid segment that comprises a cis-activating response element that is responsive to the selected substance operably linked to a gene encoding a bioluminescent reporter polypeptide. In preferred embodiments, the target analyte is glucose, glucagons, or insulin. Exposure of the bioreporter to the target substance causes the response element to up-regulate the nucleic acid sequence encoding the reporter polypeptide to produce a luminescent response that is detected and quantitated. In illustrative embodiments, the bioreporter device is encapsulated on an integrated circuit that is capable of detecting the emitted light, processing the resultant signal, and then remotely reporting the results. Also disclosed are controlled drug delivery systems capable of being directly or indirectly controlled by the detection device that provide drugs such as insulin to the animal in reponse to the amount of target analyte present in the body fluids.

Apparatus and method that improves speech recognition accuracy, by monitoring the position of a user's headset-mounted speech microphone, and prompting the user to reconfigure the speech microphone's orientation if required. A microprocessor or other application specific integrated circuit provides a mechanism for comparing the relative transit times between a user's voice, a primary speech microphone, and a secondary compliance microphone. The difference in transit times may be used to determine if the speech microphone is placed in an appropriate proximity to the user's mouth. If required, the user is automatically prompted to reposition the speech microphone.

A package system includes an integrated circuit disposed over an interposer. The interposer includes a first interconnect structure. A first substrate is disposed over the first interconnect structure. The first substrate includes at least one first through silicon via (TSV) structure therein. A molding compound material is disposed over the first interconnect structure and around the first substrate. The integrated circuit is electrically coupled with the at least one first TSV structure.

There is set forth herein an indicia reading terminal having data format conversion capabilities. The indicia reading terminal includes an image sensor integrated circuit with an image sensor array comprising a plurality of pixels. The image sensor integrated circuit is configured to output image data in a first data format to a data formatting circuit for conversion to image data in a second data format. The data formatting circuit is configured to provide the image data in the second data format to the at least one data interface of a microprocessor integrated circuit, which is operative to transfer image data received by the at least one data interface into memory of the indicia reading terminal. A CPU of the microprocessor integrated circuit is operative for executing a decoding algorithm for processing image data in the memory for attempting to decode at least one symbol represented in the memory.

The present invention consists of a secure interactive electronic account statement delivery system suitable for use over open networks such as the Internet. The invention utilizes a certification hierarchy to insure that electronic bills, invoices, and other account statements can be securely sent over open networks. The participants in the system are a certification authority, certificated banks, billers, and customers. The certification authority grants digital certificates to the certificated banks, which in turn grant digital certificates to billers and customers. Digital certificates form the basis for encryption and authentication of network communications, using public and private keys. The certificates associate a customer and biller with a certificated bank and with the electronic billing system, much like payment cards associate a customer with a payment card issuer and a particular payment card system. Digital signatures are used for authentication and non-repudiation. The certificates may be stored as digital data on storage media of a customer's or biller's computer system, or may be contained in integrated circuit or chip cards physically issued to billers and customers. The electronic bill itself may be a simple text message containing the equivalent of summary information for the bill, or may be more elaborate. In one embodiment of the invention, the electronic bill contains a number of embedded links, for example an embedded URL of a biller's world wide web server that allows the customer to interactively bring up detailed billing information by activating the link. The e-mail message may also include links to third party websites.

A package system includes an integrated circuit disposed over an interposer. The interposer includes a first interconnect structure. A first substrate is disposed over the first interconnect structure. The first substrate includes at least one first through silicon via (TSV) structure therein. A molding compound material is disposed over the first interconnect structure and around the first substrate. The integrated circuit is electrically coupled with the at least one first TSV structure.

An indicia reading terminal can comprise an image sensor integrated circuit having a two-dimensional image sensor, a hand held housing encapsulating the two-dimensional image sensor, and an imaging lens configured to focus an image of a target decodable indicia onto the two-dimensional image sensor. The two-dimensional image sensor can include a plurality of pixels arranged in repetitive patterns. Each pattern can include at least one pixel sensitive in a first spectrum region, at least one pixel sensitive in a second spectrum region, and at least one pixel sensitive in a third spectrum region. The image sensor integrated circuit can be configured to capture a frame of image data by reading out a plurality of analog signals. Each read out analog signal can be representative of light incident on a group of two or more pixels of the plurality of pixels. The image sensor integrated circuit can be further configured to convert the plurality of analog signals to a plurality of digital signals and to store the plurality of digital signals in a memory. The indicia reading terminal can be operative to process the frame of image data for attempting to decode for decodable indicia.

Circuit structures and methods of fabrication are provided for facilitating implementing a complete electronic system in a compact package. The circuit structure includes, in one embodiment, a chips-first multichip base layer with conductive structures extending therethrough. An interconnect layer is disposed over the front surface of the multichip layer and includes interconnect metallization electrically connected to contact pads of the chips and to conductive structures extending through the structural material. A redistribution layer, disposed over the back surface of the multichip layer, includes a redistribution metallization also electrically connected to conductive structures extending through the structural material. Input / output contacts are arrayed over the redistribution layer, including over the lower surfaces of at least some integrated circuit chips within the multichip layer, and are electrically connected through the redistribution metallization, conductive structures, and interconnect metallization to contact pads of the integrated circuit chips of the multichip layer.

Implantable medical devices (IMDs) having sense amplifiers for sensing physiologic signals and parameters, RF telemetry capabilities for uplink transmitting patient data and downlink receiving programming and interrogation commands to and from an external programmer or other medical device are disclosed. At least one IC chip and discrete components have a volume and dimensions that are optimally minimized to reduce its volumetric form factor. Miniaturization techniques include forming notch filters of MEMS structures or forming discrete circuit notch filters by one or more of: (1) IC fabricating inductors into one or more IC chips mounted to the RF module substrate; (2) mounting each IC chip into a well of the RF module substrate and using short bonding wires to electrically connect bond pads of the RF module substrate and the IC chip; and (3) surface mounting discrete capacitors over IC chips to reduce space taken up on the RF module substrate. The IC fabricated inductors are preferably fabricated as planar spiral wound conductive traces formed of high conductive metals to reduce trace height and width while maintaining low resistance, thereby reducing parasitic capacitances between adjacent trace side walls and with a ground plane of the IC chip. The spiral winding preferably is square or rectangular, but having truncated turns to eliminate 90° angles that cause point-to-point parasitic capacitances. The planar spiral wound conductive traces are further preferably suspended over the ground plane of the IC chip substrate by micromachining underlying substrate material away to thereby reduce parasitic capacitances.

Low dielectric materials and films comprising same have been identified for improved performance when used as interlevel dielectrics in integrated circuits as well as methods for making same. In one aspect of the present invention, an organosilicate glass film is exposed to an ultraviolet light source wherein the film after exposure has an at least 10% or greater improvement in its mechanical properties (i.e., material hardness and elastic modulus) compared to the as-deposited film.

Methods and structures relating to the formation of mixed SAMs for preventing undesirable growth or nucleation on exposed surfaces inside a reactor are described. A mixed SAM can be formed on surfaces for which nucleation is not desired by introducing a first SAM precursor having molecules of a first length and a second SAM precursor having molecules of a second length shorter than the first. Examples of exposed surfaces for which a mixed SAM can be provided over include reactor surfaces and select surfaces of integrated circuit structures, such as insulator and dielectric layers.

A single-use, self-contained device to monitor at least one physiological parameter of a subject includes a physiological sensor to sense a subject physiological parameter and generate a physiological signal. An integrated circuit is coupled to the at least one physiological sensor and processes the physiological signal. An indicator is electrically coupled to the integrated circuit and indicates information associated with the physiological parameter or the subject. A power source is electrically coupled to the physiological sensor and the indicator. A housing carries the physiological sensor, the integrated circuit, the indicator and the power source. The device includes means for limiting the device to a single use.

A structure for a semiconductor components is provided having a device layer sandwiched on both sides by other active, passive, and interconnecting components. A wafer-level layer transfer process is used to create this planar (2D) IC structure with added functional enhancements.

By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not ordinarily suitable for device production. MOSFETs that subsequently incorporate the high-precision ridges into their channel regions will typically exhibit much more precise and less variable performance than similar MOSFETs formed using optical lithography-based techniques that cannot provide the same degree of patterning accuracy. Additional performance enhancement techniques such as pulse-shaped doping and “wrapped” gates can be used in conjunction with the segmented channel regions to further enhance device performance.

A composite, layered, integrated circuit formed by bonding of insulator layers on wafers provides for combination of otherwise incompatible technologies such as trench capacitor DRAM arrays and high performance, low power, low voltage silicon on insulator (SOI) switching transistors and short signal propagation paths between devices formed on respective wafer layers of a chip. In preferred embodiments, an SOI wafer is formed by hydrophilic bonding of a wafer over an integrated circuit device and then cleaving a layer of the second wafer away using implanted hydrogen and low temperature heat treatment. Further wafers of various structures and compositions may be bonded thereover and connections between circuit elements and connection pads in respective wafers made using short vias that provide fast signal propagation as well as providing more numerous connections than can be provided on chip edges.

A method of depositing a dielectric film exhibiting a low dielectric constant in a semiconductor and / or integrated circuit by chemical vapor deposition (CVD) is provided. The film is deposited using an organosilicon precursor in a manner such that the film is comprised of a backbone made substantially of Si-O-Si or Si-N-Si groups with organic side groups attached to the backbone.

A system and integrated circuit chips used in the system utilize a bus in the form of a ring to interconnect nodes of individual components for transfer of data and commands therebetween. An example system described is a memory having one or more re-programmable non-volatile memory cell arrays connected to each other and to a system controller by a ring bus.

An integrated circuit is provided with at least one processing unit (TM), a cache memory (L2 BANK) having a plurality of memory modules, and remapping means (RM) for performing an unrestricted remapping within said plurality of memory modules. Accordingly, faulty modules can be remapped without limitations in order to optimise the utilization of the memory modules by providing an even distribution of the faulty modules.

A method for manufacturing a memory device having a plurality of memory cells. Each memory cell has a non-volatile resistive memory element with a small active area. A plurality of memory cells are formed at selected locations of at least a portion of a semiconductor wafer. To form the memory cells, a lower electrode layer and a memory material layer are deposited over at least a portion of the wafer. Patterns are formed over desired contact locations of the memory material layer and etching is used to remove portions of the memory material layer. The etching step undercuts the patterns and forms memory elements having a protruding contact portion with an apex contact area. The pattern is removed, and an upper electrode is formed and electrically coupled to the contact area. Corresponding access devices and word / bit line conductor grids are provided and coupled to the memory cells.