8511 results about "Nanowire" patented technology

A non-planar gate all-around device and method of fabrication thereby are described. In one embodiment, the device includes a substrate having a top surface with a first lattice constant. Embedded epi source and drain regions are formed on the top surface of the substrate. The embedded epi source and drain regions have a second lattice constant that is different from the first lattice constant. Channel nanowires having a third lattice are formed between and are coupled to the embedded epi source and drain regions. In an embodiment, the second lattice constant and the third lattice constant are different from the first lattice constant. The channel nanowires include a bottom-most channel nanowire and a bottom gate isolation is formed on the top surface of the substrate under the bottom-most channel nanowire. A gate dielectric layer is formed on and all-around each channel nanowire. A gate electrode is formed on the gate dielectric layer and surrounding each channel nanowire.

A transparent conductor including a conductive layer coated on a substrate is described. More specifically, the conductive layer comprises a network of nanowires that may be embedded in a matrix. The conductive layer is optically clear, patternable and is suitable as a transparent electrode in visual display devices such as touch screens, liquid crystal displays, plasma display panels and the like.

Methods of positioning and orienting nanostructures, and particularly nanowires, on surfaces for subsequent use or integration. The methods utilize mask based processes alone or in combination with flow based alignment of the nanostructures to provide oriented and positioned nanostructures on surfaces. Also provided are populations of positioned and / or oriented nanostructures, devices that include populations of positioned and / or oriented nanostructures, systems for positioning and / or orienting nanostructures, and related devices, systems and methods.

A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.

Methods for forming nanostructures of various shapes are disclosed. Nanocubes, nanowires, nanopyramids and multiply twinned particles of silver may by formed by combining a solution of silver nitrate in ethylene glycol with a solution of poly(vinyl pyrrolidone) in ethylene glycol. Hollow nanostructures may be formed by reacting a solution of solid nanostructures comprising one of a first metal and a first metal alloy with a metal salt that can be reduced by the first metal or first metal alloy. Nanostructures comprising a core with at least one nanoshell may be formed by plating a nanostructure and reacting the plating with a metal salt.

Macroelectronic substrate materials incorporating nanowires are described. These are used to provide underlying electronic elements (e.g., transistors and the like) for a variety of different applications. Methods for making the macroelectronic substrate materials are disclosed. One application is for transmission an reception of RF signals in small, lightweight sensors. Such sensors can be configured in a distributed sensor network to provide security monitoring. Furthermore, a method and apparatus for a radio frequency identification (RFID) tag is described. The RFID tag includes an antenna and a beam-steering array. The beam-steering array includes a plurality of tunable elements. A method and apparatus for an acoustic cancellation device and for an adjustable phase shifter that are enabled by nanowires are also described.

A thermoelectric material comprises two or more components, at least one of which is a thermoelectric material. The first component is nanostructured, for example as an electrically conducting nanostructured network, and can include nanowires, nanoparticles, or other nanostructures of the first component. The second component may comprise an electrical insulator, such as an inorganic oxide, other electrical insulator, other low thermal conductivity material, voids, air-filled gaps, and the like. Additional components may be included, for example to improve mechanical properties. Quantum size effects within the nanostructured first component can advantageously modify the thermoelectric properties of the first component. In other examples, the second component may be a thermoelectric material, and additional components may be included.

Methods of detecting components of interest, e.g., nucleic acids and sugars, are provided. The methods comprise contacting one or more nanowires comprising a functional group with a sample containing the component or components of interest. In one embodiment, the functional group comprises a hairpin oligonucleotide, e.g., a hairpin that changes conformation upon binding the component of interest, e.g., a nucleic acid. The change in conformation produces a change in charge that is detected. In another embodiment, the functional group comprises an enzyme, e.g., glucose oxidase, which produces a change in pH when glucose is present in a sample.

The present invention relates to nanostructured materials (including nanowires) for use in batteries. Exemplary materials include carbon-comprising, Si-based nanostructures, nanostructured materials disposed on carbon-based substrates, and nanostructures comprising nanoscale scaffolds. The present invention also provides methods of preparing battery electrodes, and batteries, using the nanostructured materials.

Methods for implementing familiar electronic circuits at nanoscale sizes using molecular-junction-nanowire crossbars, and nanoscale electronic circuits produced by the methods. In one embodiment of the present invention, a 3-state inverter is implemented. In a second embodiment of the present invention, two 3-state inverter circuits are combined to produce a transparent latch. The 3-state inverter circuit and transparent-latch circuit can then be used as a basis for constructing additional circuitry, including master / slave flip-flops, a transparent latch with asynchronous preset, a transparent latch with asynchronous clear, and a master / slave flip-flop with asynchronous preset. 3-state inverters can thus be used to compose latches and flip-flops, and latches and flip-flops can be used, along with additional Boolean circuitry, to compose a wide variety of useful, state-maintaining circuits, all implementable within molecular-junction-nanowire crossbars by selectively configuring junctions within the molecular-junction-nanowire crossbars.

A nanowire-based Li-ion rechargeable battery having superior performance with little capacity fade for use in applications including consumer electronics and medical devices is made by incorporating nanowire construction of the cathode. The nanowire-based battery system includes a nanostructured high surface area cathode structure fabricated by electrodeposition using alumina nanopore templates.

The present disclosure provides an ophthalmology implant and methods for treating glaucoma or optic neural transmission deficiency, wherein at least a portion of the implant is made of or includes a nanometer-sized substance, such as nanotubes, nanofibers, sheets from nanotubes, nanowires, nanofibrous mesh and the like.

The present invention comprises a novel process for the preparation of carbon based structured materials with controlled topology, morphology and functionality. The nanostructured materials are prepared by controlled carbonization, or pyrolysis, of precursors comprising phase separated copolymers. The precursor materials are selected to phase separate and self organize in bulk, in solution, in the presence of phase selective solvents, at surfaces, interfaces or during fabrication, into articles, fibers or films exhibiting well-defined, self-organized morphology or precursors of well-defined, self-organized, bi- or tri-phasic morphology. Compositional control over the (co)polymers provides control over the structure of the phase separated precursor whose organization therein dictates the nanostructure of the material obtained after carbonization or pyrolysis, wherein each dimension of the formed structure can be predetermined. When the precursor morphology is selected to comprise cylindrical domains this procedure additionally allows for the direct formation of two dimensional nanowire grids or arrays of oriented nanostructures on surfaces. When these nanowire grids or arrays are perpendicularly oriented to the surface applications include field emitters, high surface area electrodes, electronic devices such as diodes and transistors, tools for AMF tips and elements of molecular electronics. When the first nanostructured morphology is selected to form cylinders parallel to the surface then nanowire arrays are formed after pyrolysis. When the composition of the first nanostructured morphology is selected to comprise a continuous precursor matrix then a continuous carbon based nanostructured material is formed. The internal structure of the carbon based material can be selected to comprise perpendicular pores or an interconnected array of pores. The carbon based structures can additionally find application in photovoltaics, supercapacitors, batteries, fuel cells, computer memory, carbon electrodes, carbon foams, actuators and hydrogen storage.

This invention provides composite materials comprising nanostructures (e.g., nanowires, branched nanowires, nanotetrapods, nanocrystals, and nanoparticles). Methods and compositions for making such nanocomposites are also provided, as are articles comprising such composites. Waveguides and light concentrators comprising nanostructures (not necessarily as part of a nanocomposite) are additional features of the invention.

Sensor platforms and methods of making them are described, and include platforms having horizontally oriented sensor elements comprising nanotubes or other nanostructures, such as nanowires. Under certain embodiments, a sensor element has an affinity for an analyte. Under certain embodiments, such a sensor element comprises one or more pristine nanotubes, and, under certain embodiments, it comprises derivatized or functionalized nanotubes. Under certain embodiments, a sensor is made by providing a support structure; providing a collection of nanotubes on the structure; defining a pattern within the nanotube collection; removing part of the collection so that a patterned collection remains to form a sensor element; and providing circuitry to electrically sense the sensor's electrical characterization. Under certain embodiments, the sensor element comprises pre-derivatized or pre-functionalized nanotubes. Under certain embodiments, sensor material is derivatized or functionalized after provision on the structure or after patterning. Under certain embodiments, a large-scale array includes multiple sensors.

The present invention relates to a system and process for producing a nanowire-material composite. A substrate having nanowires attached to a portion of at least one surface is provided. A material is deposited over the portion to form the nanowire-material composite. The process further optionally comprises separating the nanowire-material composite from the substrate to form a freestanding nanowire-material composite. The freestanding nanowire material composite is optionally further processed into a electronic substrate. A variety of electronic substrates can be produced using the methods described herein. For example, a multi-color light-emitting diode can be produced from multiple, stacked layers of nanowire-material composites, each composite layer emitting light at a different wavelength.

A method for forming a platen useful for forming nanoscale wires for device applications comprises: (a) providing a substrate having a major surface; (b) forming a plurality of alternating layers of two dissimilar materials on the substrate to form a stack having a major surface parallel to that of the substrate; (c) cleaving the stack normal to its major surface to expose the plurality of alternating layers; and (d) etching the exposed plurality of alternating layers to a chosen depth using an etchant that etches one material at a different rate than the other material to thereby provide the surface with extensive strips of indentations and form the platen useful for molding masters for nano-imprinting technology. The pattern of the platen is then imprinted into a substrate comprising a softer material to form a negative of the pattern, which is then used in further processing to form nanowires. The nanoscale platen thus comprises a plurality of alternating layers of the two dissimilar materials, with the layers of one material etched relative the layers of the other material to form indentations of the one material. The platen is then oriented such that the indentations are parallel to a surface to be imprinted.

A field-effect transistor (FET) with a round-shaped nano-wire channel and a method of manufacturing the FET are provided. According to the method, source and drain regions are formed on a semiconductor substrate. A plurality of preliminary channel regions is coupled between the source and drain regions. The preliminary channel regions are etched, and the etched preliminary channel regions are annealed to form FET channel regions, the FET channel regions having a substantially circular cross-sectional shape.

A method of forming a nanowire is disclosed. A nanowire having a first dimension is deposited on a first dielectric layer that is formed on a substrate. A sacrificial gate stack having a sacrificial dielectric layer and a sacrificial gate electrode layer is deposited over a first region of the nanowire leaving exposed a second region and a third region of the nanowire. A first spacer is deposited on each side of the sacrificial gate stack. A second dielectric layer is deposited over the first dielectric layer to cover the second region and third region. The sacrificial gate stack is removed. The first region of the nanowire is thinned by at least one thermal oxidation process and oxide removal process to thin said first region from said first dimension to a second dimension.

A method of aligning nanowires on a substrate is provided. First, a plurality of the nanowires is formed on the substrate, then the plurality of nanowires is exposed to a flux of energetic ions, e.g., argon at an ion energy of 5 KV and an integrated flux density of about 6x1015 ions / cm2. The flux of energetic ions serves to align the nanowires parallel to each other. The flux of energetic ions may also be used to align the nanowires parallel to the substrate surface.

Optical films formed by deposition of highly oriented nanowires and methods of aligning suspended nanowires in a desired direction by flow-induced shear force are described.

A dye-sensitized solar cell (DSSC) comprising nanoparticles formed on a surface of a nanowire formed on a substrate and a method of fabricating the same is disclosed. The dye-sensitized solar cell comprises a first substrate. A nanowire is formed on the first substrate. A plurality of nanoparticles is then contacted with a surface of the nanowire. The dye-sensitized solar cell further comprises a dye adsorbed onto a surface of the nanoparticles. A second substrate is corresponded to the first substrate. Finally, an electrolyte is filled between the first substrate and the second substrate, and in contact with the dye and nanoparticles. The nanoparticles are bonded to the surface of nanowire to extend and increase surface contact with the dye for promoting cell efficiency (η) of the dye-sensitized solar cell.

A semiconductor structure is provided that includes a plurality of vertically stacked and vertically spaced apart semiconductor nanowires (e.g., a semiconductor nanowire mesh) located on a surface of a substrate. One end segment of each vertically stacked and vertically spaced apart semiconductor nanowires is connected to a source region and another end segment of each vertically stacked and vertically spaced apart semiconductor nanowires is connected to a drain region. A gate region including a gate dielectric and a gate conductor abuts the plurality of vertically stacked and vertically spaced apart semiconductor nanowires, and the source regions and the drain regions are self-aligned with the gate region.

A transparent conductor including a conductive layer coated on a substrate is described. More specifically, the conductive layer comprises a network of nanowires that may be embedded in a matrix. The conductive layer is optically clear, patternable and is suitable as a transparent electrode in visual display devices such as touch screens, liquid crystal displays, plasma display panels and the like.

The present invention relates generally to sub-microelectronic circuitry, and more particularly to nanometer-scale articles, including nanoscale wires which can be selectively doped at various locations and at various levels. In some cases, the articles may be single crystals. The nanoscale wires can be doped, for example, differentially along their length, or radially, and either in terms of identity of dopant, concentration of dopant, or both. This may be used to provide both n-type and p-type conductivity in a single item, or in different items in close proximity to each other, such as in a crossbar array. The fabrication and growth of such articles is described, and the arrangement of such articles to fabricate electronic, optoelectronic, or spintronic devices and components. For example, semiconductor materials can be doped to form n-type and p-type semiconductor regions for making a variety of devices such as field effect transistors, bipolar transistors, complementary inverters, tunnel diodes, light emitting diodes, sensors, and the like.

Provided are nanostructures containing electrochemically active materials, battery electrodes containing these nanostructures for use in electrochemical batteries, such as lithium ion batteries, and methods of forming the nanostructures and battery electrodes. The nanostructures include conductive cores, inner shells containing active materials, and outer shells partially coating the inner shells. The high capacity active materials having a stable capacity of at least about 1000 mAh / g can be used. Some examples include silicon, tin, and / or germanium. The outer shells may be configured to substantially prevent formation of Solid Electrolyte lnterphase (SEI) layers directly on the inner shells. The conductive cores and / or outer shells may include carbon containing materials. The nanostructures are used to form battery electrodes, in which the nanostructures that are in electronic communication with conductive substrates of the electrodes.

The present invention is directed to methods to harvest, integrate and exploit nanomaterials, and particularly elongated nanowire materials. The invention provides methods for harvesting nanowires that include selectively etching a sacrificial layer placed on a nanowire growth substrate to remove nanowires. The invention also provides methods for integrating nanowires into electronic devices that include placing an outer surface of a cylinder in contact with a fluid suspension of nanowires and rolling the nanowire coated cylinder to deposit nanowires onto a surface. Methods are also provided to deposit nanowires using an ink-jet printer or an aperture to align nanowires. Additional aspects of the invention provide methods for preventing gate shorts in nanowire based transistors. Additional methods for harvesting and integrating nanowires are provided.