374 results about "EXPOSE" patented technology

A biosensor for detecting contents of biochemical components in a sample, comprising an electrically insulating substrate, a working electrode disposed on said substrate, a reference electrode disposed on said substrate, which is spaced from said working electrode, a reaction layer disposed on said working electrode and said reference electrode, wherein said reaction layer and said electrodes form a reaction area for reacting with the sample, an electrically insulating layer disposed on said substrate and having an opening for receiving the sample, wherein said opening exposes a portion of said reaction area and the end of said opening is located at the edge of the biosensor; and a reticular covering layer which covers said opening and the end of said opening of said insulating layer wherein said reticular layer and said insulting layer form a sampling area from said reticular covering area to the edge of said biosensor.

A case for an electronic device protects the electronic device. The case has a lower case portion and an upper case portion, which assemble together to protect the electronic device. A back of the case can include a back opening to expose a camera lens and flash of the electronic device or first and second back openings. The first back opening exposes the camera lens. The second back opening exposes the flash.

The present invention relates to a cooking device 1 for cooking food under pressure. The cooking device 1 comprises a container 2 and a cover 3 used for cooperating with the container 2 to form a cooking shell; a sealing gasket 4 inserted between the cover 3 and the container 2 to rise the pressure in the cooking container; and an opening 10 formed by aligning the cover 3 at the sealing gasket 4. The device is characterized by also comprising a covering element 12, wherein the cover 3 and the covering element 12 are arranged to move relative to each other, thereby executing between the first configuration that the covering element covers the opening 10 and the second configuration that the covering element 12 exposes the opening 10.

A method for forming an air gap structure in an integrated layer stack includes dry etching a mold layer disposed on the stack in a processing system under vacuum. The mold layer is disposed between one or more interconnects, and the process of dry etching of the mold layer exposes at least a portion of the interconnects. The method also includes depositing a liner layer over the exposed portion of the interconnects. In another embodiment, a method for forming an air gap structure in an integrated layer stack includes dry etching an oxide mold layer disposed on the stack in an a first processing chamber in a processing system under vacuum. The method also includes depositing a low-k material liner layer over the interconnects, wherein the liner has a thickness of less than about 2 nanometers. The methods disclosed herein are performed in a processing system without breaking vacuum.

Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a multi-step laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.

Methods of dicing substrates having a plurality of ICs. A method includes forming a mask comprising a laser energy absorbing material layer soluble in water over the semiconductor substrate. The laser energy absorbing material layer may be UV curable, and either remain uncured or be cured prior to removal with a water rinse. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate may then be plasma etched through the gaps in the patterned mask to singulate the IC with the laser energy absorbing mask protecting the ICs for during the plasma etch. The soluble mask is then dissolved subsequent to singulation.

Laser and plasma etch wafer dicing where a mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The semiconductor wafer is coupled to a film frame by an adhesive film. The mask is patterned by laser scribing to provide a patterned mask with gaps. The laser scribing exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is plasma etched through the gaps in the patterned mask while the film frame is maintained at an acceptably low temperature with a chamber shield ring configured to sit beyond the wafer edge and cover the frame. The shield ring may be raised and lowered, for example, on lifter pins to facilitate transfer of the wafer on frame.

This disclosure generally relates to executing dynamically generated applications in a web browser-based shell. An exemplary method generally includes instantiating shared components in the browser-based shell, the shared components exposing a common runtime environment to widgets loaded into the browser-based shell. A first workflow definition representing a first step of a workflow is received. The first workflow definition specifies first widgets, comprising modular components that perform functions represented by the first step of the workflow and comprising a user interface definition, to be loaded into the browser-based shell. The first widgets are obtained from one or more of a remote source, a local cache, or a temporary memory and loaded into the browser-based shell. A user interface is generated according to the first workflow definition to exposes the function to a user which, when invoked, initiates a transition to a second step of the workflow.

Enables a database generator interface configured to map complex constructs and semantics so internal complexities are hidden while providing efficient internal storage and speed. Extracts and analyzes complex relationships in database and exposes schema as XSD to allow for external interfacing. Presents a list of tables and fields that exist in database and accepts user input to determine which tables and fields to create an interface for. Lookup fields are listed which allow for user input for specifying which fields to create XSD enumeration lists for. The generated XSD file may be saved and utilized by other mapping tools to allow for interfacing with other databases. Mapping the schema of a extended SQL database allows for users with limited understanding of the internals of the extended SQL database to connect the database to other systems using commonly available tools. May be coupled with web services to provide universal access.

The invention discloses a miniature LED display panel, a manufacturing method thereof and a display device. The miniature LED display panel comprises a miniature LED array board and a driving substrate arranged opposite to each other; the miniature LED array board includes a plurality of miniature LEDs, the miniature LED includes a first electrode layer, a second electrod elayer and a plurality offunctional layers, the plurality of functional layers are located between the first electrode layer and the second electrode layer, the second electrode layer is located at one sides of the pluralityof functional layers away from the driving substrate, a groove is arranged between two adjacent miniature LEDs, a side face of the groove exposes at least part of the functional layers, and a light-absorbing material is arranged in the groove. The miniature LED display panel provided by the invention can reduce the lateral light leakage of the miniature LEDs, reduce the risk of display color mixing caused by occurrence of optical crosstalk between pixels, and improve a display effect.

The invention discloses a smart power grid aggregation method and system for differential privacy security and fault tolerance. The method comprises the steps that a smart electric meter records and reports the electricity consumption of users in real time; a control center is responsible for collecting, processing and analyzing real-time electricity consumption data; a gateway is responsible for instruction delivery, data aggregation and security transmission between the control center and the users; a credible center is responsible for managing the whole system, and main function modules include a system initialization function module, a data aggregation request function module, a data aggregation request relay function module, a user data report function module, a security data aggregation function module and an aggregated data recovery module. According to the smart power grid aggregation method and system, the common fault tolerant function is supported, a difference privacy attack can be resisted, and the phenomenon that a hostile attacker exposes and obtains privacy information of the users by eavesdropping user communication links can be resisted; when some user data are not reported successfully, the electricity consumption of all the users with normal data reporting can still be aggregated; the smart power grid aggregation method and system have the high elastic expandability and can support efficient million-scale smart power grid electricity consumption data aggregation.

An optical lithography system that has extended depth of focus exposes a photoresist coating on a wafer, and includes an illumination sub-system, a reticle, and an imaging lens that has a pupil plane function to form an aerial image of the reticle proximate to the photoresist. The pupil plane function provides the extended depth of focus such that the system may be manufactured or used with relaxed tolerance, reduced cost and / or increased throughput. The system may be used to form precise vias within integrated circuits even in the presence of misfocus or misalignment.

The invention relates to an electric power transformer field calibration vehicle, which comprises a control chamber and an equipment bay; the equipment bay comprises an integral rack transversely arranged on the front part thereof, various current transformer calibrating equipment and measuring and controlling devices, a high-voltage calibrating device arranged in the middle part of the equipment bay in a liftable way; the top part of the vehicle body is provided with a translational electric sunroof, the high-voltage calibrating device passes through the translational electric sunroof in a controllable way and exposes out of the top of the vehicle so as to complete the calibration of a voltage transformer under high voltage. The invention combines the electric power transformer field calibrating device with the modified special vehicle, thus forming a mobile field calibration vehicle; and when in field calibration, only the corresponding equipment is output and led out of the top of the vehicle, field wiring can be conducted, thus avoiding the trouble of moving various calibrating equipments from the vehicle to the field and then moving the calibrating equipments back to the vehicle after measurement, and bringing great convenience to the field calibration.

Self-aligned contacts of a semiconductor device are fabricated by forming a metal gate structure on a portion of a semiconductor layer of a substrate. The metal gate structure contacts inner sidewalls of a gate spacer. A second sacrificial epitaxial layer is formed on a first sacrificial epitaxial layer. The first sacrificial epitaxial layer is adjacent to the gate spacer and is formed on source / drain regions of the semiconductor layer. The first and second sacrificial epitaxial layers are recessed. The recessing exposes at least a portion of the source / drain regions. A first dielectric layer is formed on the exposed portions of the source / drain regions, and over the gate spacer and metal gate structure. At least one cavity within the first dielectric layer is formed above at least one of the exposed portions of source / drain regions. At least one metal contact is formed within the at least one cavity.

The present invention relates to a system and methodology providing a multi-protocol data exchange between client and server components in an industrial automation environment. According to one aspect of the present invention, an industrial control system is provided that includes a server application operative to exchange data with an industrial controller. A server component associated with the server application is adapted to communicate via a plurality of protocols to facilitate the data exchange. A host component exposes objects in the server component, wherein the objects can be employed to communicate via a shared memory protocol according to a local operating environment. In addition, the objects can be adapted to communicate via a multicast protocol in accordance with a remote operating environment.

The invention provides an air outlet assembly and an air conditioner provided with same. The air outlet assembly comprises an air outlet panel body (10) provided with an air outlet, a door board arranged on the air outlet panel body (10) in a slidable mode and provided with a plugging position for plugging the air outlet and an avoiding position for avoiding the air outlet, a chute (30) oppositely arranged on the air outlet panel body (10), a connecting shaft connected onto the door board and installed in the chute (30), two racks (40) movably arranged in the air outlet panel body (10) and connected with the door board to drive the door board to move in the chute (30), two first gears (50) respectively meshed with the racks (40). By adopting the technical scheme, the problem that the air outlet of the air conditioner in the prior art exposes outside and accordingly dust and other pollutants enter the air conditioner is effectively solved.

The present invention provides a method of forming a chip with TSV electrode. A substrate with a first surface and a second surface is provided. A thinning process is performed from a side of the second surface so the second surface becomes a third surface. Next, a penetration via which penetrates through the first surface and the third surface is formed in the substrate. A patterned material layer is formed on the substrate, wherein the patterned material layer has an opening exposes the penetration via. A conductive layer is formed on the third surface thereby simultaneously forming a TSV electrode in the penetration via and a surface conductive layer in the opening.

Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a pulse train laser scribing process using multiple-pulse bursts to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.

The invention discloses a fingerprint recognition sensor, and belongs to the technical fields of integrated circuit encapsulating and sensor. The fingerprint recognition sensor comprises a substrate, at least one chip arranged on the upper surface of the substrate, at least one embankment wall which is arranged on the upper surface of the substrate to limit the position of the at least one chip, and a fingerprint recognition sensor chip which is arranged on the surface of the embankment wall; a groove in which a conductor layer is arranged is formed in the side edge of the upper surface of the fingerprint recognition sensor; a plastic encapsulating material exposes from the upper surface of the fingerprint recognition sensor chip or the upper surface of the fingerprint recognition sensor chip is thinly wrapped with the plastic encapsulating material. With the adoption of the fingerprint recognition sensor, the encapsulating size can be reduced, and moreover, the encapsulating process is simple, and the cost is low.

In some examples, a memory device generates and exposes parity / difference information to a test system to reduce overall test time. The parity / difference information may be generated based on parity bits read from the memory device and parity bits produced from data bits stored in the memory device. In some cases, the parity / difference information may be compared to an expected parity / difference to determine a number of correctable errors which occurred during testing, while the data bits may be compared to expected data to determine a number of uncorrectable errors which occurred during testing.

A processing terminal, for example a PDA or laptop, includes one or more application-layer programs and a network broker. The network broker exposes currently-available network resources, such as network access points in-range of the terminal, to the applications layer. The network broker is also arranged to automatically establish network connections via the or each network access point and to acquire operating parameters indicative of the status and / or performance of the connections. The available bandwidth of a connection is one example of an operating parameter. Data subsequently sent to, or transmitted from, the application-layer programs is communicated over a selected one or more of the established connections in accordance with predefined connection rules indicating which connection is / are to be selected in dependence on the operating parameters. Access credentials for enabling the terminal automatically to access a network via a different access point can also be provided using an existing connection.

The invention relates to a panhandle rotating mechanism which comprises a handle seat, a handle, a button and a spring, wherein the connecting end of the handle seat is connected with a pan body, and the other end of the handle seat is connected with the handle; the inner end of the handle is connected with the handle seat, and a cavity is arranged at a position close to the inner end of the handle; the button is arranged in the cavity; and the spring enables the button to be keep a trend of always moving towards the surface of the handle. The panhandle rotating mechanism is characterized in that: a flat connecting part is arranged at the other end of the handle seat, and the connecting part is provided with a central hole with a limit port; correspondingly, a slot in which the connecting part of the handle seat is inserted and rotated is arranged at the inner end of the handle; the button is provided with a locking block in an downward extending way, and the locking block is in locked or unlocked matching with the limit port; and the panhandle rotating mechanism further comprises a positioning sleeve which is fixed at the mouth part of the cavity so that the surface of the button exposes outside the positioning sleeve and the button is limited from ejecting out of the installation cavity. The invention has the advantages of more compact and reasonable structure, connection stability and long service life.

The invention discloses a method for secure communication of a wireless sensor network based on a combined password, belonging to the field of secret communication. The method comprises the following steps that a base station sets and exposes system parameters and respectively generates public and private key pairs (QU, SU) and (QI, SI) for a user U and a node I; when the user is communicated with the sensor node, the user utilizes SU and QI to carry out signature and encryption on K1 in sequence based on a preset session key K1, and then the user sends a ciphertext to a receiving end, and the receiving end utilizes SI and QU to carry out decryption and verification in sequence; and lastly, the user utilizes the session key K1 to realize secure communication. When the sensor node needs to be communicated with the user, the node still utilizes SI and QU to carry out signature and encryption on a selected session key K2 in sequence, and then the user sends the ciphertext to the receiving end, and the receiving end still utilizes SU and QI to carry out decryption and verification. According to the method, secure communication of the wireless sensor network is realized by utilizing a combined public key password, so that the storage requirements for identity information and the cost for the base station to produce a private key are greatly reduced.

The invention discloses a semiconductor packaging piece, a stack packaging piece using the semiconductor packaging piece and a manufacturing method of the semiconductor packaging piece. The semiconductor packaging piece comprises a chip element, a packaging body and a connecting piece; the chip element is provided with a first active surface and a second active surface which are opposite to each other; the packaging body is used for wrapping the chip element and is provided with a through hole; the connecting piece is electrically connected with the first active surface and the second active surface of the chip element through a through hole and exposes out of the semiconductor packaging piece.

A method and system for compensating for an image quality defect in an image printing system comprising at least one marking station, the at least one marking station comprising a charging device for charging the image bearing surface, an exposing device for irradiating and discharging the image bearing surface to form a latent image, a developer unit for developing toner to the image bearing surface, and a transfer unit for transferring toner from the image bearing surface to an image accumulation surface is provided. The method includes sensing the image quality defect on an image bearing surface by an electrostatic voltmeter (ESV) in the image printing system and determining the frequency, amplitude, and / or phase of the image quality defect by a processor. In one embodiment, the method includes compensating for the image quality defect by modulating the power of an exposing device during an expose process. In another embodiment, the method includes compensating for the image quality defect by modifying image content.

Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a galvanic laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.