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1649 results about "Lattice constant" patented technology

The lattice constant, or lattice parameter, refers to the physical dimension of unit cells in a crystal lattice. Lattices in three dimensions generally have three lattice constants, referred to as a, b, and c. However, in the special case of cubic crystal structures, all of the constants are equal and are referred to as a. Similarly, in hexagonal crystal structures, the a and b constants are equal, and we only refer to the a and c constants. A group of lattice constants could be referred to as lattice parameters. However, the full set of lattice parameters consist of the three lattice constants and the three angles between them.

Monolithically integrated light emitting devices

Methods and structures for monolithically integrating monocrystalline silicon and monocrystalline non-silicon materials and devices are provided. In one structure, a monolithically integrated semiconductor device structure comprises a silicon substrate and a first monocrystalline semiconductor layer disposed over the silicon substrate, wherein the first monocrystalline semiconductor layer has a lattice constant different from a lattice constant of relaxed silicon. The structure further includes an insulating layer disposed over the first monocrystalline semiconductor layer in a first region and a monocrystalline silicon layer disposed over the insulating layer in the first region. The structure includes at least one silicon-based electronic device including an element including at least a portion of the monocrystalline silicon layer. The structure also includes a second monocrystalline semiconductor layer disposed over at least a portion of the first monocrystalline semiconductor layer in a second region and absent from the first region, wherein the second monocrystalline semiconductor layer has a lattice constant different from the lattice constant of relaxed silicon. The structure includes at least one III-V light-emitting device including an active region including at least a portion of the second monocrystalline semiconductor layer.
Owner:MASSACHUSETTS INST OF TECH

Monolithically integrated light emitting devices

Methods and structures for monolithically integrating monocrystalline silicon and monocrystalline non-silicon materials and devices are provided. In one structure, a monolithically integrated semiconductor device structure comprises a silicon substrate and a first monocrystalline semiconductor layer disposed over the silicon substrate, wherein the first monocrystalline semiconductor layer has a lattice constant different from a lattice constant of relaxed silicon. The structure further includes an insulating layer disposed over the first monocrystalline semiconductor layer in a first region and a monocrystalline silicon layer disposed over the insulating layer in the first region. The structure includes at least one silicon-based electronic device including an element including at least a portion of the monocrystalline silicon layer. The structure also includes a second monocrystalline semiconductor layer disposed over at least a portion of the first monocrystalline semiconductor layer in a second region and absent from the first region, wherein the second monocrystalline semiconductor layer has a lattice constant different from the lattice constant of relaxed silicon. The structure includes at least one III-V light-emitting device including an active region including at least a portion of the second monocrystalline semiconductor layer.
Owner:MASSACHUSETTS INST OF TECH

Monolithically integrated silicon and III-V electronics

Methods and structures for monolithically integrating monocrystalline silicon and monocrystalline non-silicon materials and devices are provided. In one structure, a monolithically integrated semiconductor device structure comprises a silicon substrate and a first monocrystalline semiconductor layer disposed over the silicon substrate, wherein the first monocrystalline semiconductor layer has a lattice constant different from a lattice constant of relaxed silicon. The structure also includes an insulating layer disposed over the first monocrystalline semiconductor layer in a first region and a monocrystalline silicon layer disposed over the insulating layer in the first region. The structure includes at least one silicon-based electronic device comprising an element including at least a portion of the monocrystalline silicon layer. The structure includes a second monocrystalline semiconductor layer disposed over at least a portion of the first monocrystalline semiconductor layer in a second region and absent from the first region, wherein the second monocrystalline semiconductor layer has a lattice constant different from the lattice constant of relaxed silicon. The structure also includes at least one III-V electronic device comprising an element including at least a portion of the second monocrystalline semiconductor layer.
Owner:MASSACHUSETTS INST OF TECH

Semipolar nitride-based devices on partially or fully relaxed alloys with misfit dislocations at the heterointerface

A dislocation-free high quality template with relaxed lattice constant, fabricated by spatially restricting misfit dislocation(s) around heterointerfaces. This can be used as a template layer for high In composition devices. Specifically, the present invention prepares high quality InGaN templates (In composition is around 5-10%), and can grow much higher In-composition InGaN quantum wells (QWs) (or multi quantum wells (MQWs)) on these templates than would otherwise be possible.
Owner:RGT UNIV OF CALIFORNIA
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