An Asymmetric Reconfigurable Field Effect Transistor

Abstract

The invention discloses an asymmetrical reconfigurable field effect transistor. The transistor comprises a channel, a drain arranged at one end of the channel, a source extended to the inside of the channel at the other end of the channel, and a drain arranged at one end of the channel. The gate oxide on the outside, the control gate and the polarity gate respectively arranged on the source and drain terminals and outside the gate oxide, respectively arranged outside the two ends of the channel, are used for the control gate, the polarity gate The side wall electrically isolating the source and the drain, and the gate isolation arranged outside the gate oxide for isolating the control gate and the polarity gate. In the present invention, the contact area between the source end extending into the channel and the nanowire channel is larger, thereby increasing the tunneling area of ​​carriers and increasing the turn-on current. When it is turned off, the drain structure is the same as the non-overlapping area of ​​the general RFET drain structure, and the leakage current remains basically unchanged, so the current switching ratio is improved, and the logic gate current is shortened while keeping the static power consumption unchanged. operation delay time.

Description

technical field [0001] The invention belongs to digital logic and memory devices in CMOS very large integrated circuits (VLSI), in particular to an asymmetric reconfigurable field effect transistor. Background technique [0002] The size and function scaling of CMOS devices is pushing information processing technology into new application fields. This scaling enables many applications to be realized through stronger performance and higher complexity. However, because the reduction of device size will eventually reach the physical limit in the future, new information processing devices and micro-architectures are currently being explored to continue the development cycle of integrated circuits that doubles the performance of chips with the same area every 18 months in history, and can be reconfigured Field Effect Transistor (RFET) is one of them. Because RFET is a device that can obtain N-type and P-type electrical characteristics by applying different voltages on the port, ...

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Problems solved by technology

[0006] The purpose of the present invention is to solve the problem that the open-state drive current of the existing general symmetrical structure reconfigurable transistor is low, in order to improve the open current of the device, shorten the switching time of the transistor, and shorten the operation delay of the logic gate, propose an asymmetric The reconfigurable field effect transistor of the symmetric structure can realize the improvement of the N-type and P-type leakage currents of the device under the same order of magnitude as the leakage current of the N-type and P-type devices. Different polarity open-state driving current, improve the current switching ratio of the device, reduce the delay time of the logic gate of the integrated circuit, and increase the characteristic frequency of the transistor

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