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Method for increasing writing speed of floating body cell

A technology of floating body effect and storage unit, which is applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc. It can solve problems such as incompatibility, limited application, and difficult manufacturing process, so as to increase the substrate current and increase the writing speed , Improve the effect of the longitudinal electric field

Active Publication Date: 2014-08-06
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

In addition to transistors, each storage unit of traditional embedded dynamic memory (eDRAM) also needs a deep trench capacitor structure. The deep trench of the capacitor makes the height of the storage unit much larger than its width, which makes the manufacturing process difficult
Its manufacturing process is very incompatible with CMOS VLSI process, which limits its application in embedded system chip (SOC)

Method used

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  • Method for increasing writing speed of floating body cell
  • Method for increasing writing speed of floating body cell
  • Method for increasing writing speed of floating body cell

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Embodiment Construction

[0021] The present invention will be specifically explained below in conjunction with the accompanying drawings and embodiments.

[0022] The method for improving the writing speed of the floating body effect memory unit according to the embodiment of the present invention comprises the following steps:

[0023] Step 1, such as figure 1 As shown in , two floating body effect memory cells 1 are used as a group to form a group arrangement of floating body effect memory cells. Two floating body effect memory cells share one source terminal 2 . The distance between the polysilicon gates 11 of two floating body effect memory cells 1 in the floating body effect memory cell group is smaller than the distance between the two floating body effect memory cell groups; trench isolation is provided between the two floating body effect memory cell groups .

[0024] Step 2, such as figure 2 As shown, a sidewall film is formed by using a sidewall deposition process for the floating body ...

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Abstract

The method for improving the writing speed of a floating body effect memory unit of the present invention includes the following steps: using a side wall deposition process to form a side wall film on the floating body effect memory unit; using an etching process to etch the floating body effect memory after side wall deposition Unit, the etching process has a dense / isolation effect; source and drain heavy doping and annealing processes are used. The method for improving the writing speed of floating body effect memory cells of the present invention utilizes existing processes to, on the one hand, increase the longitudinal electric field in the drain end channel and increase the substrate current, and on the other hand, reduce the leakage of accumulated carriers from the source end. speed, thus improving the writing speed of floating body effect memory cells.

Description

technical field [0001] The invention relates to a method for increasing the writing speed of a memory unit, in particular to a method for improving the writing speed of a floating body effect memory unit. Background technique [0002] The development of embedded dynamic storage technology has made large-capacity dynamic random access memory (DRAM) very common in current system-on-chip (SOC). Large-capacity embedded dynamic memory (eDRAM) brings various benefits to SoCs such as improved bandwidth and reduced power consumption that can only be achieved by using embedded technology. In addition to transistors, each memory cell of traditional embedded dynamic memory (eDRAM) also needs a deep trench capacitor structure. The deep trench of the capacitor makes the height of the memory cell much larger than its width, which makes the manufacturing process difficult. Its manufacturing process is very incompatible with CMOS VLSI process, which limits its application in embedded syste...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8242H10B12/00
Inventor 俞柳江李全波周军
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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