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100704 results about "Hemt circuits" patented technology

Wearable Modular Interface Strap

A wearable modular interface strap device for supporting multiple module units comprising a flexible strap with a plurality of electrically connected nodes acting as docking points to serial bus interface and mechanically connect removable modules, with the strap being 10 mechanically lockable in a loop by a clasp containing hub and host circuitry to enable network communication between modules and to a universal connector plug for recharging and data-exchange. Said strap containing a plurality of electrical wires between control circuitry and nodes and arranged to be wearable as a wristband, alternatively as a wrist device that when opened forms a curved handset with audio input and outputs at alternate ends, or arranged in a necklace configuration. Said device capable of supporting interchangeable modules such as displays, control devices, rechargeable batteries, a module with removable earpiece units, and a plurality of functional modules suitable for communication, data storage, location and environment sensing.
Owner:DANIEL SIMON R +1

Planar capacitor memory cell and its applications

InactiveUS7209384B1Less complicated to fabricateImprove performanceTransistorSolid-state devicesHemt circuitsEngineering
A capacitor memory is realized, wherein a capacitor stores data and a diode controls to store data “1” or “0”. Diode has four terminals wherein first terminal serves as word line, second terminal serves as storage node, third terminal is floating, and fourth terminal serves as bit line, wherein back channel effect is suppressed adding additional ions in the bottom side of third terminal or applying negative voltage in the well or substrate. A capacitor plate couples to second terminal, which plate has no coupling region to first, third and fourth terminal. With no coupling, the inversion layer of plate in the storage node is isolated from the adjacent nodes. In doing so, the plate can swing ground level to positive supply level to write. As a result, no negative generator is required for controlling plate. Word line and bit line keep ground level during standby, and rise to supply level for read or write operation. In this manner, no holding current is required during standby, and operating current is dramatically reduced with no negative generator. Write has a sequence to clear the state of cell before writing to store data regardless of previous state. Refresh cycle is periodically asserted to sustain data. The present invention can be applied for destructive read, or for nondestructive read adding pull-down device to bit line. The height of cell is almost same as control circuit on the bulk or SOI wafer.
Owner:KIM JUHAN
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