5808 results about "Parasitic capacitance" patented technology

Implantable medical devices (IMDs) having sense amplifiers for sensing physiologic signals and parameters, RF telemetry capabilities for uplink transmitting patient data and downlink receiving programming and interrogation commands to and from an external programmer or other medical device are disclosed. At least one IC chip and discrete components have a volume and dimensions that are optimally minimized to reduce its volumetric form factor. Miniaturization techniques include forming notch filters of MEMS structures or forming discrete circuit notch filters by one or more of: (1) IC fabricating inductors into one or more IC chips mounted to the RF module substrate; (2) mounting each IC chip into a well of the RF module substrate and using short bonding wires to electrically connect bond pads of the RF module substrate and the IC chip; and (3) surface mounting discrete capacitors over IC chips to reduce space taken up on the RF module substrate. The IC fabricated inductors are preferably fabricated as planar spiral wound conductive traces formed of high conductive metals to reduce trace height and width while maintaining low resistance, thereby reducing parasitic capacitances between adjacent trace side walls and with a ground plane of the IC chip. The spiral winding preferably is square or rectangular, but having truncated turns to eliminate 90° angles that cause point-to-point parasitic capacitances. The planar spiral wound conductive traces are further preferably suspended over the ground plane of the IC chip substrate by micromachining underlying substrate material away to thereby reduce parasitic capacitances.

Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronic applications are disclosed. One aspect of the invention combines a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and high voltage devices. Improved methods of fabrication for power devices are provided according to other aspects of the invention. Improvements to specific processing steps, such as formation of trenches, formation of dielectric layers inside trenches, formation of mesa structures and processes for reducing substrate thickness, among others, are presented. According to another aspect of the invention, charge balanced power devices incorporate temperature and current sensing elements such as diodes on the same die. Other aspects of the invention improve equivalent series resistance (ESR) for power devices, incorporate additional circuitry on the same chip as the power device and provide improvements to the packaging of charge balanced power devices.

A lateral heterojunction bipolar transistor (HBT) is formed on a semiconductor-on-insulator substrate. The HBT includes a base including a doped silicon-germanium alloy base region, an emitter including doped silicon and laterally contacting the base, and a collector including doped silicon and laterally contacting the base. Because the collector current is channeled through the doped silicon-germanium base region, the HBT can accommodate a greater current density than a comparable bipolar transistor employing a silicon channel. The base may also include an upper silicon base region and / or a lower silicon base region. In this case, the collector current is concentrated in the doped silicon-germanium base region, thereby minimizing noise introduced to carrier scattering at the periphery of the base. Further, parasitic capacitance is minimized because the emitter-base junction area is the same as the collector-base junction area.

A pixel current driver comprises a plurality of thin film transistors (TFTs) each having dual gates and for driving OLED layers. A top gate of the dual gates is formed between a source and a drain of each of the thin film transistors, to thereby minimize parasitic capacitance. The top gate is grounded or electrically tied to a bottom gate. The plurality of thin film transistors may be two thin film transistors formed in voltage-programmed manner or five thin film transistors formed in a current-programmed ΔVT-compensated manner. Other versions of the current-programmed circuit with different numbers of thin film transistors are also presented that compensate for δVT. The OLED layer are continuous and vertically stacked on the plurality of thin film transistors to provide an aperture ratio close to 100%.

A semiconductor device with a low-k material in close proximity thereto and its fabrication method. The device includes a gate electrode overlying a substrate. An electrically conductive plug is provided immediately adjacent to the gate electrode and making electrical contact to the device. A low-k dielectric material is disposed in the space between the gate electrode and the electrically conductive plug whereby reducing the parasitic capacitance. Thus, higher density of devices can be formed without decreasing operating speed.

A system for communicating across conventional HVAC wiring is provided. The system includes a communication device having a communication module capable of inducing low power, high frequency current signals into a single control wire coupling, for example, a thermostat with a compressor. The communication module includes a power supply module that draws power sufficient to operate the communication module from the existing HVAC wiring, so as to eliminate any need for batteries or external power sources. A second communication module may be coupled to the single control wire. The second communication module operates as a transceiver sending communication signals to, and receiving communication signals from, the communication module. In one embodiment, the communication module is disposed within a building, for example coupled to an electronic thermostat, while the second communication module is disposed outside the building near the compressor. The communication signals are RF modulated signals between 5 and 50 MHz so as to take advantage of and pass across parasitic capacitances found inherent in transformers or other coils disposed within HVAC loads.

In a drive device for an active type light emitting display panel which can apply a reverse bias voltage to an EL element, in order to be able to compensate deterioration in light-emitting efficiency of the EL element accompanied by applying of the reverse bias voltage and the like, one pixel 10 is composed of a controlling TFT (Tr1), the driving TFT (Tr2), a capacitor C1, and the EL element E1. Switching switches SW1, SW2 mutually enables a supplying state of a forward current to the EL element E1 and an applying state of the reverse bias voltage to be selected. In one control form according to the present invention, when the applying state of the reverse bias voltage shifts to the supplying state of the forward current, by switching one switch first, the anode and cathode of the EL element E1 are made to the same electrical potential to allow electrical charges to be discharged. Thus, charge of the forward current for a parasitic capacitance of the EL element E1 can be performed rapidly, and rising of the lighting operation of the EL element can be advanced.

A system for communicating across conventional HVAC wiring is provided. The system includes a communication device having a communication module capable of inducing low power, high frequency current signals into a single control wire coupling, for example, a thermostat with a compressor. The communication module includes a power supply module that draws power sufficient to operate the communication module from the existing HVAC wiring, so as to eliminate any need for batteries or external power sources. A second communication module may be coupled to the single control wire. The second communication module operates as a transceiver sending communication signals to, and receiving communication signals from, the communication module. In one embodiment, the communication module is disposed within a building, for example coupled to an electronic thermostat, while the second communication module is disposed outside the building near the compressor. The communication signals are RF modulated signals between 5 and 50 MHz so as to take advantage of and pass across parasitic capacitances found inherent in transformers or other coils disposed within HVAC loads.

A method for performing an analysis of at least one logic stage in a netlist, which include one or more drivers, is provided. The method includes operations of generating at least one look-up table for an output transient current to be based on values of input and output voltages using data available from a cell library; synthesizing analytically at least one current source model, which includes a DC component and a plurality of parasitic capacitances, using the look-up table; simulating the logic stage using the current source model to model the drivers; and obtaining characteristics of the simulated logic stage. A system and a machine-readable medium for performing the method are also provided.

A shift register includes a plurality of stages to generate a plurality of output signals, in sequence. Each of the stages includes a driving circuit, a charging circuit, a discharging circuit and a holding circuit. The driving circuit is configured to generate a first output signal in response to a first clock signal or a second clock signal having a phase different from the first clock signal. The charging circuit is configured to charge an electric charge in response to a scan start signal or a second output signal of an adjacent previous stage. The discharging circuit is configured to discharge the electric charge in response to a third output signal of an adjacent next stage. The holding circuit is configured to maintain the first output signal within a first voltage when the first output signal is in an inactive state. Therefore, a parasite capacitance is decreased to prevent a floating of a pull-up transistor.

Integrated circuits and methods for fabricating integrated circuits are provided. In one example, an integrated circuit includes a semiconductor substrate. A first fin and a second fin are adjacent to each other extending from the semiconductor substrate. The first fin has a first upper section and the second fin has a second upper section. A first epi-portion overlies the first upper section and a second epi-portion overlies the second upper section. A first silicide layer overlies the first epi-portion and a second silicide layer overlies the second epi-portion. The first and second silicide layers are spaced apart from each other to define a lateral gap. A dielectric spacer is formed of a dielectric material and spans the lateral gap. A contact-forming material overlies the dielectric spacer and portions of the first and second silicide layers that are laterally above the dielectric spacer.