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51 results about "Oxygen annealing" patented technology

Method for regulating phase-transition temperature of vanadium dioxide film

ActiveCN104261873AReduced flexibilityMake up for the lack of flexibilityVanadium dioxideOxygen annealing
The invention provides a method for regulating a phase-transition temperature of a vanadium dioxide film. According to the method, a metal vanadium or low-valence vanadium oxide film is subjected to oxygen annealing in vacuum; and the phase-transition temperature of the produced vanadium dioxide film is regulated by changing oxygen partial pressure in the annealing process. The manner for regulating the phase transition is not depended on a substrate, can be implemented on a crystal substrate as well as on a non-crystal substrate, and is a very simple and efficient method for regulating the phase-transition temperature of the vanadium dioxide film. The method has high flexibility, is simple to operate and low in cost, and can be compatible to or co-used with other methods for regulating the phase-transition temperature.
Owner:SHANGHAI INST OF TECHNICAL PHYSICS - CHINESE ACAD OF SCI

Method of forming a two-layer gate dielectric

A substrate is provided, and a silicon dioxide thin film is formed thereon. Subsequently, an amorphous silicon thin film is formed over the silicon dioxide thin film, and a low temperature plasma nitridation process is preformed to form a nitrogen-containing amorphous silicon thin film. Following that, an oxygen annealing process is carried out to form a nitrogen-rich silicon oxynitride layer.
Owner:UNITED MICROELECTRONICS CORP

Manufacturing method of semiconductor structure

A manufacturing method of a semiconductor structure includes the following steps. A high-k dielectric layer is formed on a semiconductor substrate, and a barrier layer is formed on the high-k dielectric layer. An oxygen annealing treatment is performed after the step of forming the barrier layer; and a capping layer is formed on the barrier layer after the oxygen annealing treatment.
Owner:UNITED MICROELECTRONICS CORP

Annealing method for improving luminous efficiency of cerium-doped yttrium aluminum garnet crystal

The invention relates to an annealing method for improving luminous efficiency of a cerium-doped yttrium aluminum garnet crystal, which is characterized by performing low temperature oxygen annealing or high temperature hydrogen annealing on the cerium-doped yttrium aluminum garnet (Ce:YAG) crystal grown by a graphite heater method. The method comprises the following steps: cleaning the crystal with acetone or alcohol first; placing the Ce:YAG crystal on a white stone or a pure YAG crystal substrate in a hearth; raising the temperature; annealing at a constant temperature; reducing the temperature to room temperature; and taking the Ce:YAG crystal out of the hearth. The annealing method can effectively eliminate the carbon-related defect in the crystal and improve the permeability of the crystal; and Ce<2+> ions formed in the growth process in the crystal are oxidized, thus the concentration of Ce<3+> ions needs to be increased and Ce<4+> ions are inhibited as much as possible at the same time to avoid quenching effect caused by the Ce<4+> ions so that the luminous intensity of the Ce:YAG crystal is improved to the utmost extent.
Owner:杭州光学精密机械研究所

Preparation method of potassium-sodium niobate ceramic material with high remnant polarization strength

The invention discloses a preparation method of a potassium-sodium niobate ceramic material with high remnant polarization strength, and relates to a preparation method for improving the remnant polarization strength of K0.5Na0.5NbO3 ceramic. The invention aims to solve the technical problem that the existing lead-free K0.5Na0.5NbO3 ceramic is low in remnant polarization intensity. The method comprises the following steps: mixing dried potassium carbonate and sodium carbonate powder with niobium pentoxide powder and then carrying out wet ball milling; drying, putting the dried raw materials into a tubular furnace for presintering, then carrying out wet ball milling, putting the dried raw materials into a hot-pressing furnace in an oxygen atmosphere for high-temperature and high-pressure sintering, and putting ceramic slices obtained by hot-pressing sintering into the tubular furnace for oxygen annealing so as to obtain the K0.5Na0.5NbO3 ceramic with high remnant polarization strength.The remnant polarization intensity of the ceramic is 24-27 [mu] C / cm < 2 >, which is 1.6-2.7 times that of K0.5Na0.5NbO3 ceramic prepared by a traditional solid-phase method, and the ceramic can be used in the fields of electricity and electronics.
Owner:HARBIN INST OF TECH

Charge-trapping type storage element and preparation technology therefor

The invention discloses a charge-trapping type storage element and a preparation technology therefor. The structure of the storage element is Si substrate / SiO2 tunneling layer / Ga2O3 layer / Au electrode, wherein the SiO2 tunneling layer is generated through the depositing of a Ga2O3 layer on the Si substrate and then oxygen annealing. The preparation technology comprises the steps: (1), depositing the Ga2O3 layer on the Si substrate through employing a magnetron sputtering method, and forming a Si substrate / Ga2O3 layer composite structure; (2), increasing the temperature of the Si substrate / Ga2O3 layer composite structure in an oxygen atmosphere to an annealing temperature 540 DEG C to 720 DEG C from the room temperature at a constant speed, and then starting the cooling to the room temperature at the constant speed, thereby forming a Si substrate / SiO2 tunneling layer / Ga2O3 layer composite structure; (3), growing an Au electrode on the surface of the Ga2O3 layer of the Si substrate / SiO2 tunneling layer / Ga2O3 layer composite structure, and obtaining the storage element with the Si substrate / SiO2 tunneling layer / Ga2O3 layer / Au electrode structure.
Owner:HEBEI UNIVERSITY

Method for reducing oxidation erosion of grid stack layer

A method for reducing grid stacked layer oxidation erosion is to insert nitrogen ions onto sidewall surface of the grid stacked layer by tilt ion insertion method, so the sidewall surface is full of nitrogen ions, then oxygen annealing is undergone to form a silicon nitride oxigen layer on the grid stacked layer sidewall surface to stop continued oxidation of the polysilicon on the grid stacked layer, which can not only avoid thickenss increase on the dielectric edge resulted in oxidation erosion of the polysilicon layer, but also eliminate polysilicon remains.
Owner:MACRONIX INT CO LTD

Method preparing high on/off ratio TaOx resistive random access memory (RRAM)

The invention discloses a method preparing a high on / off ratio TaOx resistive random access memory (RRAM); the method comprises the following steps: 1, selecting a low-resistance P-type silicon as a substrate, and cleaning and drying the substrate; 2, using a DC reaction magnetron sputtering method to deposit a TaOx resistive change layer on the substrate formed in step1; 3, using the magnetron sputtering method to deposit an Ag electrode on the obtained TaOx resistive change layer, thus obtaining a memory matrix; 4, annealing the memory matrix obtained in step3 so as to improve the TaOx resistive change layer oxygen content and improve the crystallization degrees, thus obtaining the high on / off ratio TaOx resistive random access memory (RRAM). The method combines the DC reaction magnetronsputtering method with the oxygen annealing mode to obtain the TaOx resistive change layer; when a bias test is applied, the method can greatly reduce the RRAM electric leakage current, can greatly improve the on / off ratio, can prevent permanence breakdown, and can increase circulation cycles.
Owner:XI AN JIAOTONG UNIV

Rare earth doped niobate single-crystal up-conversion luminescent material and preparation method thereof

The invention relates to a rare earth doped niobate single-crystal up-conversion luminescent material and a preparation method thereof, and relates to the technical field of up-conversion luminescentmaterials. The method comprises the following steps: A, preparing a polycrystalline material having a theoretical composition of yEr-K<x>Na<1-x>NbO<3> according to a molar ratio; B, preparing a crystal growth starting material according to a molar ratio; C, putting the crystal growth starting material into a growth crucible, and growing a Er-KNN single crystal by using a top seed crystal growth method at a temperature of 1000-1400 DEG C; D, performing annealing on the Er-KNN single crystal; and E, testing up-conversion luminescence properties of the product. The method provided by the invention can grow the large-sized Er-KNN single crystal, in particular, the up-conversion luminescence characteristics of the product disappear after vacuum annealing at a temperature of 400-600 DEG C, and the up-conversion luminescence intensity of the product is enhanced by nearly 20 times after oxygen annealing at a temperature of 700-800 DEG C; therefore, the Er-KNN single crystal provides a solid technical material basis for the fields such as oxygen sensors and optical waveguides.
Owner:SHANGHAI NORMAL UNIVERSITY

POLO-IBC solar cell and preparation method thereof

The invention discloses a POLO-IBC solar cell and a preparation method thereof. The method comprises the following steps of: S1, texturing a silicon wafer; S2, forming a tunneling oxide layer on the back surface of the silicon wafer; S3, forming an n-type amorphous silicon layer on the tunneling oxide layer; S4, forming an n + lightly doped layer on the front surface of the silicon wafer, and converting the n-type amorphous silicon layer on the back surface of the silicon wafer into an n-type polycrystalline silicon layer; S5, forming a P-type region and an N-type region; S6, performing thermal oxygen annealing; S7, respectively forming an AlOx passivation layer and a SiNx antireflection layer on the n + lightly doped layer and a SiO2 passivation layer in sequence; and S8, forming an N-type electrode and a P-type electrode. The preparation method is simple in process, short in production period and low in cost.
Owner:ZHEJIANG AIKO SOLAR ENERGY TECH CO LTD +2

Semiconductor structures and fabrication methods thereof

Semiconductor structure and fabrication method thereof are provided. An exemplary method includes providing a semiconductor substrate including a plurality of first fin structures, each having a first width, and a plurality of second fin structures, each having a second width greater than the first width. The method further includes forming a first isolation film covering sidewall surfaces of the first fin structures and the second fin structures, forming a trench in the first isolation film to expose at least a top portion of at least one sidewall surface of one or more second fin structures, forming an isolation fluid layer to fill the trenches, and performing an oxygen annealing process to convert a surface layer of the top portion of the at least one sidewall surface of the one or more second fin structures into a by-product layer, and to convert the isolation fluid layer into a second isolation film.
Owner:SEMICON MFG INT (SHANGHAI) CORP +1

Method for preparing ultra-thin germanium oxide interface repairing layer on Ge substrate

The invention discloses a method for preparing an ultra-thin germanium oxide interface repairing layer on a Ge substrate. The method comprises the steps of: selecting a Ge substrate, removing a natural oxide layer on the surface of the Ge substrate, then transferring the Ge substrate in a cavity of an atomic layer deposition system, and depositing a layer of Al2O3 film on the surface of the Ge substrate to serve as an O2 barrier layer in a thermal oxidation process; placing the Ge substrate with the Al2O3 film deposited on the surface thereof into a rapid annealing furnace, and forming an ultra-thin GeOx interface layer at an Al2O3 / Ge interface by utilizing a thermal oxidization way in an O2 atmosphere; placing the Ge substrate with the ultra-thin GeOx interface layer formed at the Al2O3 / Ge interface into the atomic layer deposition reaction cavity, and depositing a high-k gate medium on the Al2O3 film; after grate medium deposition is carried out successively, performing annealing and low-temperature oxygen annealing by utilizing the rapid annealing furnace to further improve the quality of the oxide gate medium and improve the quality of the k-medium / Al2O3 / GeOx / Ge interface. The method is also applicable to a Ge-based MOS (Metal Oxide Semiconductor), an MOSFET (Metal-Oxide -Semiconductor Field Effect Transistor) and other devices including a Ge-based gate laminated layer.
Owner:INST OF MICROELECTRONICS CHINESE ACAD OF SCI

Preparation of single domain SmBCO superconduction block material

The invention provides a method for preparing single-domain samarium-barium-copper-oxygen (Sm-Ba-Cu-O) superconducting bulk materials. The method is characterized in that neodymium, barium, copper and oxygen to which MgO powder is added are adopted as seed crystals; a Sm2BaCuO5 phase, a BaCuO2 phase and a CuO phase are prepared according to a certain molar ratio, and a proper amount of CeO2 powder is added at the same time; the materials are evenly mixed and then are pressed in the uniaxial direction so as to be made into a Sm-Ba-Cu-O pre-melted block; and the pre-melted block grows into a Sm-Ba-Cu-O bulk material having a single-domain structure through a powder melting process, and then is turned into a single-domain Sm-Ba-Cu-O superconducting bulk material via oxygen annealing treatment. The Sm-Ba-Cu-O superconducting bulk material prepared by use of the method is good in technical repeatability and relatively lower in requirement on the maximum temperature of equipment, and the method is easier to obtain a bulk material sample having appearance of a single-domain structure.
Owner:NORTHWEST INSTITUTE FOR NON-FERROUS METAL RESEARCH

Manufacturing method for bearing ball

The invention relates to a manufacturing method for a bearing ball. The manufacturing method comprises the following steps of 1) selecting materials: selecting the materials and rough machining by upsetting and forging; 2) putting the materials into a 300 ton presser and hot forging at a temperature of 1,000-1,200 DEG C; 3) carrying out annealing treatment by using an oxygen-free annealing furnace at a temperature of 850-890 DEG C, keeping the temperature for 3-6 h and cooling; 4) carrying out cold rolling treatment after cooling and then quenching in a quenching furnace at a temperature of 100-200 DEG C; 5) melting the materials in a melting furnace and making melt liquid into a plurality of small cast ingots; and 6) putting the cast ingots in a grinding machine and grinding the cast ingots into balls. The balls manufactured by the method are good is quality and long in service life, and can effectively guarantee operations of machine equipment.
Owner:王天波

TOPCon battery phosphorus diffusion process

The invention provides an excellent TOPCon battery phosphorus diffusion process, which adopts a mode of crystallizing an amorphous silicon layer at a high temperature and then carrying out gradual diffusion propulsion, that is, crystallizing the amorphous silicon layer by prolonging the heating and constant temperature process time before diffusion, carrying out first diffusion + constant temperature propulsion and second diffusion + cooling propulsion after cooling, and carrying out annealing with oxygen. By means of the method, the amorphous silicon layer has a high crystallization proportion, meanwhile, the situation that phosphorus atoms penetrate through the tunneling oxide layer is effectively reduced, polycrystalline silicon has higher electromobility and stable photoelectric performance compared with amorphous silicon, the effect of the tunneling layer is guaranteed, the TOPCon structure formed by the doped amorphous silicon and the tunneling oxide layer enhances the effect of selecting a carrier, and the efficiency of the solar cell is improved.
Owner:POPSOLAR TECH (XUZHOU) CO LTD

Method for preparing germanium oxide interface repairing layer by using in-situ ozone oxidation

The invention discloses a method for preparing a germanium oxide interface repairing layer by using in-situ ozone oxidation. The method comprises the steps of: selecting a Ge substrate, removing a natural oxide layer on the surface of the Ge substrate, then transferring the Ge substrate in a cavity of an atomic layer deposition system, and depositing a layer of Al2O3 film on the surface of the Ge substrate to serve as an O3 barrier layer in an oxidation process; oxidizing at an Al2O3 / Ge interface to form a layer of a GeOx interface layer by using a precursor O3 in the atomic layer deposition system as an oxidant; placing the Ge substrate with the ultra-thin GeOx interface layer formed at the Al2O3 / Ge interface into the atomic layer deposition reaction cavity, and depositing a high-k gate medium on the Al2O3 film; after gate medium deposition is carried out successively, performing annealing and low-temperature oxygen annealing by utilizing a rapid annealing furnace to further improve the quality of the oxide gate medium and improve the quality of the high-k medium / Al2O3 / GeOx / Ge interface. The method for preparing the germanium oxide interface repairing layer by using the in-situ ozone oxidation realizes interface stability and high quality required by a gate laminate layer in a Ge-based MOS (Metal Oxide Semiconductor) device, and is suitable for a Ge-based MOS capacitor, an MOSFET (MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) and other devices including the Ge-based gate laminate layer.
Owner:INST OF MICROELECTRONICS CHINESE ACAD OF SCI

Charge storage device based on oxide nanoparticles formed by in-situ annealing, and preparation method thereof

The invention discloses a charge storage device based on oxide nanoparticles formed by in-situ annealing, and a preparation method thereof. A layer of metal Zr thin film is grown by virtue of a pulsedlaser deposition method; and in-situ oxygen annealing treatment is carried out to form a ZrO2 nanoparticle storage medium. The preparation method of the charge storage device based on the ZrO2 nanoparticles formed by the in-situ annealing is simple in operation and can realize large-scale preparation.
Owner:ANYANG NORMAL UNIV

Method for passivating high-k/Ge interface by ozone while improving high-k gate dielectric

The invention provides a method for passivating a high-k / Ge interface by ozone while improving a high-k gate dielectric. The method comprises the steps of: providing a substrate, wherein the substrate is a Ge substrate or a wafer containing a Ge thin film surface; carrying out high-k gate dielectric growing and ozone treatment on the substrate alternately, and forming a high-k / GeOx / Ge gate stack structure on the substrate; and performing low-temperature oxygen annealing on the high-k gate dielectric to enhance quality of the high-k gate dielectric. By adopting the method for passivating the high-k / Ge interface by ozone while improving the high-k gate dielectric, the ultrathin GeOx layer is formed on the Ge surface, further the EOT is reduced, the quality of the high-k / Ge interface is improved, and good high-k / Ge interface passivation effect is achieved.
Owner:INST OF MICROELECTRONICS CHINESE ACAD OF SCI

Method for Detecting Oxygen Leakage in Reaction Chamber of Annealing Equipment

The invention discloses a method for detecting oxygen leakage of a reaction chamber of annealing equipment. The method comprises the following steps: a wafer substrate is provided; an oxidation layer and a polycrystalline silicon layer are deposited on the wafer substrate; ion implantation is carried out on the wafer substrate; annealing treatment is carried out on the wafer substrate in the reaction chamber of the annealing equipment; resistance of the wafer substrate is measured after annealing and the resistance is defined as first resistance; under the same condition, resistance of the wafer substrate in the annealing equipment's reaction chamber without oxygen leakage is defined as second resistance; and the second resistance is compared with the first resistance. If the second resistance is greater than the first resistance, it is judged that the reaction chamber of the annealing equipment is leaking oxygen. According to the relationship between oxygen content and resistance of the wafer after annealing, whether the reaction chamber of the annealing equipment is leaking oxygen, the amount of leaked oxygen, distribution situation of oxygen in the reaction chamber and oxygen leakage position can be detected. As metallic element is not used, short circuit of a semiconductor device and pollution to the equipment are avoided, and costs are reduced.
Owner:CSMC TECH FAB2 CO LTD

Crystalline silicon cell high-temperature low-oxygen annealing equipment convenient for material receiving

The invention discloses crystalline silicon cell high-temperature low-oxygen annealing equipment convenient for material receiving, which comprises a machine body, a conveyor belt, a support plate, a high-temperature low-oxygen annealing furnace, an air inlet, a temperature sensor, a dust removal mechanism, a first hydraulic cylinder, a snap ring and a material receiving mechanism, wherein a motor is arranged in the machine body; a conveying drum is arranged in theconveyor belt; the supporting plate is fixedly connected with the machine body, the high-temperature low-oxygen annealing furnace is arranged above the conveyor belt, the air volume adjusting device is arranged in the high-temperature low-oxygen annealing furnace, the air inlet is formed between the light source cooling device and the light source, the temperature sensor is arranged below the heating device, the dust removal mechanism is arranged on the right side of the high-temperature low-oxygen annealing furnace, and the first hydraulic cylinder is arranged below the top plate. According to the crystalline silicon cell high-temperature low-oxygen annealing equipment convenient for material receiving, the dust removal mechanism and the material receiving mechanism are arranged, the dust removal mechanism can effectively remove dust on the surface of a crystalline silicon cell, the dust removal effect is good, and the material receiving mechanism facilitates storage of the annealed crystalline silicon cell.
Owner:徐州中辉光伏科技有限公司

based on si 3 no 4 Preparation method of charge storage device coated with metal oxide nanocrystal

The invention discloses a Si-based 3 N 4 Method for preparing charge storage devices coated with metal oxide nanocrystals, deposited on SiO by pulsed laser 2 Si is first deposited sequentially on the surface of the tunneling layer 3 N 4 and metal M film, and then in-situ oxygen annealing to fully oxidize metal M to M 2 O 3 Nanocrystalline, followed by deposition of Si 3 N 4 thin film, forming Si 3 N 4 Coating the storage layer of metal oxide nanocrystals, and then sequentially depositing SiO 2 The barrier layer and Al electrode form a charge storage device based on Si3N4-coated metal oxide nanocrystals, where M can be selected from Fe and La.
Owner:ANYANG NORMAL UNIV

A Method for Improving the Properties of High-Temperature Superconducting Strips Using Electrochemical Method

The invention discloses a method for improving performance of a high-temperature superconduction strip by an electrochemical method. The method comprises the following steps of a) preparing an organicsolution; b) removing a protection layer of a high-temperature superconduction strip sample; c) electrochemically processing the high-temperature superconduction strip of which the protection layer is removed by the prepared organic solution; d) taking out the high-temperature superconduction strip sample after being processed by the electrochemical method, and drying the high-temperature superconduction strip sample; e) depositing the protection layer on a surface of the dried high-temperature superconduction strip sample; and f) performing oxygen-through annealing on the high-temperature superconduction strip sample deposited with the protection layer. By the method, the performance such as the superconduction conversion temperature and the critical current density of the high-temperature superconduction strip can be obviously improved; and meanwhile, the method is simple, is easy to operate and is completely and repeatedly controllable.
Owner:SHANGHAI JIAO TONG UNIV

Ferroelectric capacitor devices and a method for compensating for damage to a capacitor caused by etching

InactiveUS20050101142A1Compensate effectively for composition and crystallinity damageSemiconductor/solid-state device manufacturingCapacitorsCapacitancePlatinum
A ferroelectric capacitor in which damage caused by etching exposed faces of a ferroelectric layer of the capacitor is compensated by depositing a seeding layer of ferroelectric material such as PZT on one or more exposed faces of the ferroelectric layer and depositing an electrode layer made of conductive material such as platinum on the seeding layer. An oxygen annealing recovery process is applied to the device. The seeding layer can transform the phase of the damaged surfaces from amorphous to crystalline during the recovery annealing process and, at the same time, provide the damaged surfaces of the ferroelectric layer with missing element(s), for example lead. The oxygen necessary for recovery of the damage may be obtained through the platinum layer from the oxygen atmosphere.
Owner:POLARIS INNOVATIONS LTD
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