A method of modification of a semiconductor layout is provided. The layout comprises objects of semiconductor material with corners and edges. The method comprises a step of receiving (61) a set of proximities, triggers and design rules, the proximities indicating relations between neighboring edges and / or corners, the triggers defining boundaries for the modification within which boundaries the proximities are valid, the design rules describing physical requirements for the semiconductor layout. The method further comprises a step of generating (62) a set of constraints, based on the received proximities, triggers and design rules, each constraint in the set of constraints defining a limit within which the semiconductor layout may be modified without changing the proximities. Then the set of constraints to obtain a modified semiconductor layout is solved (63).