The present invention discloses a manufacturing method of IGBT silicon epitaxial wafer, the selecting P type of the heavily Boron-doped & 1t; 100 &g t; the polished piece, the electrical resistivity <= 0.02 Omega cm, the partial flatness <= 1.5 mm, the backing layer of oxide at side edge without the width <= 1mm; appropriate increasing polished time and improving the technique temperature, selecting appropriate HC1 flow quantity 8-10L at 1180 EDG C, polishing time 10 min, sweeping more than 10min by using high flow rate H2 after polishing; synthetic considering factors such as self-doping, crystal lattice quality, electric resistivity control and production efficiency, etc, selecting appropriate epitaxial process condition with double-layer, silicon source using ultra-pure trichlorosilane, first step developing temperature 1080-1100 EDG C, developing rate-controlling 0.8-1.0 Mu m, second step developing temperature 1120-1150 EDG C, developing rate-controlling 1.2-1.6 Mu m, the double-layer epitaxial growth controlled by different adulterate source accurately.