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72results about How to "Reduce bombardment" patented technology

Hollow anode for plasma thruster of cusped magnetic field

The invention provides a hollow anode for a plasma thruster of a cusped magnetic field, and relates to a plasma thruster of a cusped magnetic field. By the hollow anode for the plasma thruster of the cusped magnetic field, the problems that a permanent magnet is demagnetized and the service life of a thrust is shortened due to the fact that an anode of the existing thruster of a cusped magnetic field is over hot are solved. The ionization rate of the thruster is increased, and the performance of the thruster is further improved. The hollow anode for the plasma thruster of the cusped magnetic field comprises a gas distributor, a buffering cavity and a ceramic sleeve, wherein a gas supply piece comprises a guide tube and a cavity; and the gas distributor comprises the gas supply piece and a distributor bottom plate. The hollow anode for the plasma thruster of the cusped magnetic field is used in the field of plasma thrusters of the cusped magnetic field.
Owner:HARBIN INST OF TECH

Bosch etching method

ActiveCN103400800AHigh bombardment energyLow bombardment energySemiconductor/solid-state device manufacturingRadio frequencyPolymer
The invention provides a Bosch etching method. The method comprises the following steps: a substrate is fixed on a base in a reaction chamber, and a mask layer with an opening is formed on the substrate; etching is performed: etching gas is piped in, a source radio frequency power source is applied to the reaction chamber so as to maintain plasma concentration in the reaction chamber, meanwhile, a first bias power source is applied to the base, and partial substrate is etched along the opening so as to form an etching hole; deposition is performed: deposition gas is piped in, a second bias power source is applied to the base, deposition is performed on the side wall surface of the etching hole and the surface of the mask layer so as to form a polymer, wherein the frequency of the second bias power source is larger than that of the first bias power source; etching and deposition are performed repeatedly until a through hole is formed in the substrate. The Bosch etching method provided by the invention can guarantee the etching rate, and meanwhile has higher stability.
Owner:ADVANCED MICRO FAB EQUIP INC CHINA

Etching method

The invention discloses an etching method, comprising: providing a substrate with a dielectric layer which comprises an etching stopping layer and a middle dielectric layer on the etching stopping layer; using a first gas to carry out a first etching on the middle dielectric layer and stopping the etching in the middle dielectric layer; using a second gas to carry out a second etching on the etching stopping layer and the middle dielectric layer and stopping the second etching in the etching stopping layer; and using a third gas to carry out a third etching on the etching stopping layer after the second etching, wherein, the etching speed rate of the third gas on the etching stopping layer is larger than the etching speed rate of the second gas on the etching stopping layer, and the etching speed rate of the third gas on the middle dielectric layer is smaller than the etching speed rate of the second gas on the middle dielectric layer. The technical scheme of the invention uses different etching gases to selectively etch the dielectric layer, thus reducing the root sinking of the middle dielectric layer after etching.
Owner:SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP

Sputter target, method for manufacturing a layer, particularly a tco (transparent conductive oxide) layer, and method for manufacturing a thin layer solar cell

In the present invention a sub-stoichiometric ceramic ZnOx:Al target, with 0.3<x<1, is used for depositing a ZnO:Al layer in a reactive sputtering process. The process is carried out in an Ar / O2 atmosphere. The diagram depicts the deposition rate R depending on the oxygen flow in a sputtering process according to the present invention compared with a conventional sputter process using a stoichiometric ZnO target. The upper line x<1 indicates the deposition rate R when using the inventive target and process. The lower line x=1, for comparison only, indicates the deposition rate R when using a stoichiometric ceramic ZnO target. It can be seen from the diagram that both processes are quite stable as there are no steep slopes when varying the oxygen flow. However, the line x<1 is above the line x=1. Therefore, a working point P may be selected which has a higher deposition rate R than a corresponding working point P of a corresponding ceramic target. A higher deposition rate, however, entails a lower bombardment of the deposited layer with oxygen ions. Therefore, the quality of the ZnO:Al layer is improved as far as the conductivity and the etchability of the layer are concerned.
Owner:APPLIED MATERIALS INC

Method for removing photoresist and method for manufacturing mosaic structure

The invention relates to a removing method of photosensitive resist which comprises the following steps of: providing semiconductor structure with a photosensitive resist layer, arranging the semiconductor structure into the oxygen plasma environment and removing the photosensitive resist layer by the incineration of the oxygen plasma, wherein, the generated power of an excitation source of the oxygen plasma is less than or equal to 400W; the invention also provides a method for applying the removing method of photosensitive resist to manufacture mosaic structure; the invention causes less damage to a dielectric layer of the lower layer of the photosensitive resist layer in the technique of removing the photosensitive resist.
Owner:SEMICON MFG INT (SHANGHAI) CORP

Nano silicon window layer with gradient band gap characteristic and preparation method thereof

The invention relates to a nano silicon window layer with the gradient band gap characteristic, which is formed by depositing on the surface of a sample to be processed, wherein the surface of the sample to be processed is sequentially stacked with a metal back electrode M, a transparent conductive back electrode T1, an n-type Si-based thin film N and an intrinsic Si-based thin film I. The nano silicon window layer is formed by sequentially stacking a silicon thin film P1, a silicon thin film P2 and a silicon thin film P3. A preparation method of the nano silicon window layer comprises the following steps: depositing the p-type silicon thin film P1 with small thickness under a low glow power; then gradually raising the power and depositing the thin film P2; and finally, and completing the window layer P3 under a high power. The nano silicon window layer has the advantages that when the nano silicon window layer is applied to the window layer of an n-i-p-type silicon-based thin film solar cell, high electric conductance and wide band gap can be acquired, the bombardment of a solar cell i / p interface can be effectively reduced, the band gap matching between an intrinsic layer and the window layer can be implemented and the filling factor, the open-circuit voltage and the spectral response of the solar cell are obviously improved, so that the silicon-based thin film solar cell with high photoelectric conversion efficiency is obtained.
Owner:NANKAI UNIV

Heterojunction solar cell and preparation method thereof

The invention relates to the solar photovoltaic technical field, and discloses a heterojunction solar cell and a preparation method thereof. The heterojunction solar cell and the preparation method are used for reducing the bombardment force exerted on amorphous silicon thin films when sedimentation transparent electric conduction oxide thin film layers are sputtered, increasing the open-circuit voltage and the short-circuit current density of the heterojunction solar cell, and improving the production efficiency. The preparation method of the heterojunction solar cell includes the steps of forming the first transparent electric conduction oxide thin film layers on an amorphous silicon layer of the first electric conduction type and an amorphous silicon layer of the second electric conduction type through the first sputtering method respectively, wherein the energy of sputtering particles in the first sputtering method is lower than that of sputtering particles in a direct-current magnetron sputtering method; forming the corresponding second transparent electric conduction oxide thin film layer on each first transparent electric conduction oxide thin film layer through a second sputtering method, wherein the energy of sputtering particles in the second sputtering method is higher than that of the sputtering particles in the first sputtering method.
Owner:ENN SOLAR ENERGY

Dry etching device

The invention provides a dry etching device. Compared with the existing dry etching device, by increasing the thickness of a focus ring (72) under an edge ring (71) for withstanding ion bombardment or reducing the dielectric constant of the material of the focus ring (72) under the edge ring (71) for withstanding ion bombardment, the sheath voltage on the surface of the edge ring (71) is reduced based on the Kirchhoff's law of partial pressure. Therefore, bombardment of ions to the edge ring (71) is weakened, the service life of the edge ring (71) is prolonged, the normal working time of the dry etching device is increased, and the maintenance cost is reduced.
Owner:WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD

Method for reducing plasma induced damage in HDP CVD (high-density plasma chemical vapor deposition) process

ActiveCN102110635AAvoid direct bombardmentReduce PID phenomenonSemiconductor/solid-state device manufacturingVoltageDeposition process
The invention discloses a method for reducing plasma induced damage in an HDP CVD (high-density plasma chemical vapor deposition) process. The method comprises the following steps: putting a wafer needing to be processed in a high-density plasma reaction cavity to undergo a stable pressure treatment process, a plasma excitation treatment process and a gas circulation treatment process in sequence; carrying out a primary oxygen-enriched silicon dioxide protective layer deposition process; carrying out a silicon-enriched silicon dioxide protective layer deposition process to deposit a silicon-enriched silicon dioxide protective layer; carrying out a heating treatment process; and carrying out a secondary oxygen-enriched silicon dioxide protective layer deposition process, a preset bias voltage treatment process and a main layer deposition process in sequence. The method has the beneficial effects of effectively reducing the phenomenon of plasma induced damage and improving the yield andreliability of the semiconductor devices.
Owner:SEMICON MFG INT (SHANGHAI) CORP +1

A double-grid controlled cold cathode electron gun and a preparation method thereof

The invention relates to the technical field of vacuum electronic devices, and discloses a double-grid control type cold cathode electron gun and a preparation method thereof. In accordance with the present invention, A simple, a new type of electron gun with long service life and excellent performance is provided, the cold cathode is used as the emission source of the vacuum electronic device, Asurface of the cold cathode is arrayed by a cathode grid, which can effectively weaken the electrostatic shielding effect of electron emitted by large area cold cathode material, the emission currentof large area cold cathode material is increased, At the same time, the surface of the cathode substrate is designed as a whole plane so as to not only avoid machining burr and other problems, improveedge effect and spark phenomenon, but also make the electric field distribution on the surface of cathode substrate flat, which is conducive to improving the uniformity of emission current density and achieving the purpose of large current emission, so the electron gun can be used in vacuum electron radiation components or devices that generate large current and high density electron beam.
Owner:UNIV OF ELECTRONICS SCI & TECH OF CHINA

Preparation method of modified cellulose insulating paper

The invention relates to a preparation method of modified cellulose insulating paper, and belongs to the technical field of preparation of insulating materials. The preparation method comprises the steps of: firstly adopting micro-explosion to generates a pressure difference inside fiber during pressurization and instantaneous pressure releasing under the condition of maintaining intrinsic physical mechanical properties and complete appearance of birch fiber so as to form high-pressure airflow which impact from inside to outside inside the birch fiber, destroying cell walls, pit membranes andother weak tissue of the birch fiber so as to achieve preliminary fiber degradation, then mixing the obtained fiber after preliminary fiber degradation is conducted with tartaric acid, performing cooking at high temperature and high pressure, carrying out beating and oxidizing to obtain modified paper pulp, then utilizing a reaction of sodium silicate, hydrochloric acid and aminopropyl triethoxy silane so as to prepare modified nano silica, mixing the modified nano silica with the modified paper pulp, then carrying out papermaking, and performing a hot pressing reaction to obtain the modifiedcellulose insulating paper. The obtained insulating paper has good insulation performance, high mechanical strength and a broad application prospect.
Owner:江苏源清环保科技有限公司

ITO thin film sputtering process and ITO thin film sputtering device

The invention discloses an ITO thin film sputtering process and an ITO thin film sputtering device. The ITO thin film sputtering process comprises steps of: 1) limiting the output voltage of a direct-current sputtering power supply to be lower than the nominal voltage of the direct-current sputtering power supply, and applying a preset power to a target material through the direct-current sputtering power supply; 2) feeding process gas into a reaction cavity, wherein the pressure of the process gas in the reaction cavity is set to be a preset pressure capable of glow starting of the process gas so that the process gas can be subjected to glow starting in the reaction cavity; and 3) lowering the pressure of the process gas in the reaction cavity to be lower than the preset pressure, applying a sputtering power to the target material through the direct-current sputtering power supply and sputtering, wherein the sputtering power is not less than the preset power and is not more than the rated power of the sputtering power supply. The ITO thin film sputtering process can lower the voltage peak value of glow starting.
Owner:BEIJING NAURA MICROELECTRONICS EQUIP CO LTD

Formation method and HDPCVD method for metal interlay dielectric film layer

The invention relates to a formation method and an HDPCVD method for a metal interlay dielectric film layer. The HDPCVD method for the metal interlay dielectric film layer adopts a two-step deposition process; a deposition sputtering ratio D / S in the first-step deposition is smaller than the D / S in the second-step deposition; in the first-step deposition, the D / S is 2.1-3.5; the power is 2,800-3,200W; the gas flow is as follows: 100-120sccm of argon, 80-100sccm of oxygen, and 40-50sccm of SiH<4> and SiF<4> altogether; in the second-step deposition, the D / S is 5.1-7.5; the power is 2,300-2,700W; and the gas flow is as follows: 100-120sccm of argon, 160-190sccm of oxygen, and 80-90sccm of SiH<4> and SiF<4> altogether. The HDPCVD method adopts the two-step deposition process; the second-step deposition adopts relatively low power; meanwhile, the gas flow is regulated to enable the environment of an overall deposition chamber to change, thereby obviously relieving a metal angle-cutting phenomenon; meanwhile, relatively low RF power is adopted in the second-step deposition to reduce a bombardment effect, so that the deposition rate in the second-step deposition is increased, thereby improving filling rate while lowering HDP cost; and in addition, the tape-out time of a product can be obviously shortened while the capacity can be improved.
Owner:CSMC TECH FAB2 CO LTD

ITO thin film sputtering process and ITO thin film sputtering apparatus

The invention discloses an ITO thin film sputtering process and an ITO thin film sputtering apparatus. The method comprises the following steps: before introducing process gas into a reaction chamber, controlling output voltage of a direct current sputtering power source to be predetermined voltage and applying predetermined power on a target material by using the direct current sputtering power source; introducing the process gas into the reaction chamber after predetermined time so as to allow the process gas to realize glow starting in the reaction chamber; and after glow starting, applying sputtering power on the target material by using the direct current sputtering power source to implement sputtering, wherein the sputtering power is more than or equal to the predetermined power but less than or equal to the rated power of the sputtering power source. The ITO thin film sputtering process provided by the invention can greatly reduce glow starting voltage, mitigates bombardment of a GaN layer caused by too high particle energy at the moment of glow starting and effectively reduces damage to the GaN layer. Moreover, since no new mechanism is needed, stability is improved, adjustment of the process can be conveniently carried out, and thin film deposition uniformity is enhanced.
Owner:BEIJING NAURA MICROELECTRONICS EQUIP CO LTD

Preparation method of high-flux and high-strength polytetrafluoroethylene water body filtration composite nanofiltration membrane

The invention relates to the technical field of polytetrafluoroethylene membrane filtration, and discloses a preparation method of a high-flux and high-strength polytetrafluoroethylene water body filtration composite nanofiltration membrane. The preparation method comprises the following steps: S1, performing hydrophilic modification treatment on a hydrophobic polytetrafluoroethylene microfiltration membrane; S2, preparing a water phase solution and an organic phase solution; S3, putting the hydrophilic polytetrafluoroethylene microfiltration membrane in step S1 into the organic phase solutionfor soaking, taking out the hydrophilic polytetrafluoroethylene microfiltration membrane, sucking the redundant organic phase solution on the surface of the hydrophilic polytetrafluoroethylene by using sponge, then putting the hydrophilic polytetrafluoroethylene microfiltration membrane into a sodium alginate solution for soaking, and then putting the hydrophilic polytetrafluoroethylene microfiltration membrane into the water phase solution for an interfacial polymerization reaction to obtain a nanofiltration membrane intermediate; and S4, carrying out heat drying treatment on the nanofiltration membrane intermediate to obtain the composite nanofiltration membrane. The polytetrafluoroethylene composite nanofiltration membrane prepared in the invention has high strength and high permeationflux, so the water pressure resistance and the filtering efficiency of the composite nanofiltration membrane are improved.
Owner:陈奎东

Preparation method of low surface pore and low dielectric constant thin-film material

The invention discloses a preparation method of a low surface pore and low dielectric constant thin-film material. The preparation method comprises steps as follows: a silicon substrate is provided, cleaned and placed in electron cyclotron resonance plasma equipment; decamethylcyclopentasiloxane is placed in a constant-temperature evaporator and sent into the electron cyclotron resonance plasma equipment; a controller is adjusted to enable decamethylcyclopentasiloxane to form a plasma, and a porous SiCOH thin film is formed on the surface of the silicon substrate through deposition; and the porous SiCOH thin film obtained through deposition is placed on a work station for hole sealing treatment of the surface of the plasma. According to the preparation method, the continuity of the preparation process is good, and the thin-film material is prevented from being exposed to the atmosphere and polluted; the low surface pore and low dielectric constant thin-film material prepared with the preparation method suffers smaller bombardment and is high in quality; and simultaneously, the surface pores of the material are reduced, the diffusion of copper in the surface of a low dielectric constant thin film is reduced, and the electrical property of a copper / low dielectric constant material integrated system is effectively improved.
Owner:SUZHOU UNIV

Electrical insulation structure for Hall thruster air supply pipeline

ActiveCN105840444AIncrease the critical breakdown voltageHigh dielectric strengthMachines/enginesUsing plasmaEdge surfaceElectricity
The invention provides an electrical insulation structure for a Hall thruster air supply pipeline and relates to the field of electrical insulation of electric thrusters. By the adoption of the electrical insulation structure for the Hall thruster air supply pipeline, the problems that in the prior art, an insulation failure of the outer side of a gas circuit insulator of a Hall thruster is caused by the flashover mechanism of a vacuum insulation edge surface and an insulation failure of the inner side of the insulator is caused by the low-pressure breakdown mechanism are solved. According to the electrical insulation structure for the Hall thruster air supply pipeline, the cross section of a ceramic insulator is shaped like the Chinese character 'shan', the outer surface of the ceramic insulator in of a cylindrical structure, the middle end of the ceramic insulator is of a convex groove structure, and by the adoption of the structure, the length of a creepage channel can be greatly increased in a limited space, and the degree of impact of the creepage channel by spatial plasmas under the action of an electric field of an electrode is decreased; and meanwhile, a gas distributor pipeline is wrapped in the ceramic insulator, bombardment of the insulator edge surface in the position which is high in potential and high in electric field intensity is reduced, and accordingly the insulation strength of the vacuum edge surface flashover resistance is improved.
Owner:HARBIN INST OF TECH

Low-damage AlGaN/GaN HEMT gate groove etching method

The invention discloses a low-damage AlGaN GaN HEMT gate groove etching method, and belongs to the technical field of semiconductor manufacturing. In the etching process of the method, the movement direction of ions in plasma is controlled to be horizontal to the direction of a substrate, and the concentration of the plasma is controlled to be 108-1010 cm<3>, the etching uniformity is improved, the roughness of an etching surface is reduced, the bombardment of the plasma on the surface of a sample is reduced to the minimum, the purpose of reducing surface damage is achieved, meanwhile, the etching rate can be reduced to 2-3 nm / min, and the etching precision is controlled accurately in the etching process.
Owner:JIANGNAN UNIV

A medium-embedded meander metal ribbon high-frequency structure

The invention discloses a medium-embedded zigzag metal strip high-frequency structure. The dielectric substrate of the microstrip high-frequency structure is replaced by a dielectric support rod having the same change period as the zigzag metal strip, and at the same time, the dielectric support rod is partially embedded in the zigzag metal strip. , the exposed area of ​​the medium facing the electron beam is greatly reduced, and the dielectric support rod is partially embedded in the meandering metal belt, which further reduces the exposed area of ​​the medium, thereby reducing the probability of electrons bombarding the dielectric substrate and avoiding the generation of charge accumulation effect . At the same time, in order to enable the dielectric support rods to be embedded in the meandering metal strip, it is necessary to use a relatively thicker metal band than the meandering metal band printed on the dielectric substrate. Due to the increase in thickness, the meandering metal band can better withstand electron bombardment and improve the Structural stability, better thermal conductivity. In addition, compared with the existing planar microstrip high-frequency structure composed of a dielectric substrate and meandering metal strips, the invention also has wider cold bandwidth and higher coupling impedance.
Owner:UNIV OF ELECTRONICS SCI & TECH OF CHINA

Microwave sulphur lamp on basis of electron cyclotron resonance discharge

InactiveCN103700568AThe ignition process is rapidReduce bombardmentGas discharge lamp detailsMean free pathMagnet
The invention discloses a microwave sulphur lamp on the basis of electron cyclotron resonance discharge. The microwave sulphur lamp comprises a magnet for generating a magnetic field and a corresponding fixing assembly and is characterized in that the magnet provides the specific magnetic field distribution, so that in the igniting and light emitting process of the microwave sulphur lamp, plasmas in a lamp bulb meet the electron cyclotron resonance condition. According to the invention, the igniting process of the microwave sulphur lamp is more rapid and stable and meanwhile, the service life of the lamp bulb is prolonged. According to the invention, cyclotron resonance is introduced, so that electrons in the lamp bulb take the cyclotron motion, a mean free path of motion of the electrons is improved and energy of the electrons is further promoted, and thus, adsorption efficiency of the plasmas on microwaves is improved.
Owner:UNIV OF ELECTRONIC SCI & TECH OF CHINA

Method for covering thin film in hole and semiconductor processing apparatus

The present invention provides a method for covering a thin film in a hole and a semiconductor processing apparatus. The method of covering a thin film in the hole comprises the following steps: step1, depositing a thin film on the bottom of the hole and at least a part of the sidewall by a sputtering process; and step 2, bombarding the positively charged process gas ions on the thin film at thebottom of the hole by an etching process to improve the step coverage of the sidewall near the bottom of the hole. The method of covering the film in the hole can not only improve the process performance, but also give consideration to the production capacity of the apparatus.
Owner:BEIJING NAURA MICROELECTRONICS EQUIP CO LTD

Magnetron sputtering equipment

The invention discloses magnetron sputtering equipment. The magnetron sputtering equipment comprises a vacuum chamber wall, a connecting shaft, a workbench and an electric conduction electrode, wherein the vacuum chamber wall surrounds a vacuum chamber; one end of the connecting shaft is connected to the vacuum chamber wall, the workbench is arranged in the vacuum chamber and is arranged on the other end of the connecting shaft, and the workbench is used for fixing a substrate; the electric conduction electrode is arranged on the vacuum chamber wall in a penetrating manner, one end of the electric conduction electrode is connected with the workbench, the workbench is electrically connected with an external power source through the electric conduction electrode, and the external power source applies high potential on the workbench through the electric conduction electrode. The magnetron sputtering equipment provided by the invention has the advantages that the workbench and the substrate are protected by the high potential, electrification positive ions flying to the substrate is influenced by electric field acting force in the opposite direction, the quantity and energy of electrification positive particles are greatly reduced, the bombardment of the surface of the substrate caused by the electrification positive particles is reduced, the sediment deposited on the surface of the substrate is protected, the surface of the sediment is smooth, and the quality of a crystal is good.
Owner:SHENZHEN INST OF ADVANCED TECH +1

Double cup cover ion source filament seat structure for preventing metal spraying

The invention relates to the technical field of ion sources, and particularly discloses a double cup cover ion source filament seat structure for preventing metal spraying. The structure adopts a simple double cup cover set shackle structure, and achieves the functional effect of insulation (tungsten filament spraying and plasma bombardment and the like) in bad working conditions by adding insulating parts as least as possible and size change at a position with limited space; an upper cover completely covers a rectangular block structure of a molybdenum rod, thus greatly reducing plasma bombardment which is easily suffered, fully utilizing the safety clearance between a lower cup cover and a ceramic straight tube to achieve better insulation effect and avoiding short-circuit phenomenon of an anode of an ion source metal wall and a filament cathode; by the design structure, the invention solves the problem that short circuit occurs to the ceramic insulation part of the seat body due to the metal plating and filament spraying and plasma bombardment in the research process of large-power ion source, greatly improves experiment safety coefficient and simultaneously prolongs the service life of the filament and the ceramic part.
Owner:SOUTHWESTERN INST OF PHYSICS

Magnetron sputtering device and sputtering cathode thereof

The invention discloses a magnetron sputtering device and a sputtering cathode thereof. The sputtering cathode comprises a cathode panel, a cathode and an anode cover, wherein the cathode panel and the cathode panel are insulated. For magnetron sputtering, the cathode is applied with a power negative electrode, and the cathode panel is relatively a positive electrode, and the anode cover is also connected with the cathode panel. Therefore, the anode cover is also a positive electrode relative to the target. After addition of the anode cover, ionized electrons fly to the anode cover, thereby reducing the bombardment of the electrons on the glass substrate to be coated, reducing the effect of electrons on the coating process, and further improving the uniformity of the film and the surface resistance.
Owner:WGTECH JIANGXI

Reel-to-reel equipment plasma strength deactivation device and method

The invention discloses a reel-to-reel equipment plasma strength deactivation device and method, the device comprises an unreeling cabin, a cell quartz ingot, a coil, a quartz tube, a reeling cabin, an equipment frame and a radio frequency controller, the unreeling device is arranged at one end of the upper end surface of the equipment frame, and the reeling cabin is arranged at the other end of the equipment frame. The reel-to-reel equipment plasma strength deactivation device and method have the advantages that the adopted cell quartz ingot is used for ensuring the reaction and protecting uniform inlet of the air source, accordingly, the particle movement of the plasma inclined unreeling cabin can be effectively hindered, the route of the plasma is well shortened, besides, the microporesin the cell quartz ingot can hinder the plasma route, the plasma effective collision is greatly improved to reduce the plasma strength, the plasma entering the unreeling cabin is reduced, the possibility of corroding the outer surface of a copper foil reel and the end surface of the reel edge is realized, the bombarding of the plasma to the substrate surface is weakened, the internal stress of the film and the substrate is reduced, and the film-forming quality and efficiency are improved.
Owner:ANHUI BEQ EQUIP TECH

Method for manufacturing bipolar transistor

ActiveCN102074474AIncrease current working rangeImprove current gainSemiconductor/solid-state device manufacturingSemiconductor devicesCMOSEtching
The invention relates to a method for manufacturing a bipolar transistor, which comprises the following steps of: forming a complementary metal oxide semiconductor (CMOS) gate; performing low pressure deposition to form a tetraethoxysilane layer on the gate; performing a sidewall soft corrosion process, etching the tetraethoxysilane layer and repairing silicon wafer surface defects caused by the etching; and forming a CMOS source and a CMOS drain. In the method, a film layer forming a sidewall is etched and the silicon wafer surface defects caused by the etching are repaired, so a current workspace is increased and the current gain of the vertical NPN bipolar transistor is greatly improved.
Owner:CSMC TECH FAB2 CO LTD

Binary composite La2O3 and Ta2O5-doped molybdenum negative electrode material and preparation method thereof

The invention provides a binary composite La2O3 and Ta2O5-doped molybdenum negative electrode material and a preparation method thereof, and belongs to the technical field of rare-earth refractory metal negative electrode materials. The total additive amount of active materials La2O3 and Ta2O5 in a negative electrode substrate is 3-5wt%, wherein the additive amount of the Ta2O5 is 0.05%-0.5%; and the balance is Mo. The method comprises the steps of mixing a lanthanum nitrate solution, an ammonium heptamolybdate solution and a citric acid solution, adding tantalum oxide powder and then carrying out water-bath heating, mechanical stirring and drying to finally form dried gel; decomposing the dried gel to obtain La2O3 and Ta2O5-doped MoO3 powder; doping the La2O3 and the Ta2O5 obtained from the mixed oxide powder through a secondary reduction process into molybdenum powder; carrying out pressing, sintering, carbonizing, activating and seasoning treatment on the powder to obtain the negative electrode material with good emission property. The material is excellent in thermionic emission property and meets the operating requirements of a negative electrode in a microwave oven magnetron.
Owner:BEIJING UNIV OF TECH
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