Provided is a liquid-cooled power
semiconductor wafer plate crimping packaging structure with micro channels on double surfaces. The plate crimping packaging structure comprises a power
semiconductor wafer, a spring needle,
graphite flakes, an emitter
electrode metallic sheet, a collector
electrode metallic sheet, a top cooling plate, a bottom cooling plate, and a
ceramic tube housing.
Graphite flakes are pressed on the top surface and the bottom surface of the
wafer. The emitter
electrode metallic sheet is arranged on the
graphite flake to be used as a leading out terminal for leading out the collector electrode of the wafer, while the collector electrode metallic sheet is arranged on the
graphite flake to be used as a leading out terminal for leading out the emitter electrode of the wafer. The graphite flakes, the emitter electrode metallic sheet, and the collector electrode metallic sheet are sealed in the
ceramic tube housing. The top cooling plate is pressed on the top of the
ceramic tube housing, while the bottom cooling plate is pressed on the bottom of the ceramic tube housing. Cooling micro channels are disposed on the top cooling plate and the bottom cooling plate. The spring needle is pressed on the central position of the top cooling plate in order to lead out the gate electrode of the wafer. The plate crimping packaging structure has advantages of achieving connection without leading wires, reducing
stray inductance and stray
capacitance generated by leading
wire bonding, and increasing a current conducting capability,
heat conducting capability, an anti-thermal-shock capability, and reliability, and advantages of a small structural size, a
high heat dissipating coefficient, a long service life, and an intelligent monitoring function.