36results about How to "Meet the requirements of process design" patented technology

A semiconductor device and a method for forming the same, wherein the method includes: providing a semiconductor substrate, the semiconductor substrate includes a first region and a second region, the second region is adjacent to the first region; forming intrinsic fins and dummy fins, the intrinsic The characteristic fin is located on the first region of the semiconductor substrate, and the dummy fin is located on the second region of the semiconductor substrate; a first isolation layer is formed on the first region and the second region of the semiconductor substrate, and the first isolation layer covers the dummy fin A part of the sidewall of the intrinsic fin and a part of the sidewall of the intrinsic fin; a protective layer is formed on the surface of the intrinsic fin, and the area of ​​the intrinsic fin that is higher than the surface of the first isolation layer is covered by the protective layer; the dummy fin and the first isolation layer are removed. The first isolation layer in the second region; after removing the dummy fin and the first isolation layer in the second region and forming the protective layer, forming a second isolation layer on the second region of the semiconductor substrate. The method prevents the width of the intrinsic fin adjacent to the second region from being too small.

The invention discloses an identification method for three-dimensional computer-aided design (CAD) model intersection manufacture characteristics. The identification method for the three-dimensional CAD model intersection manufacture characteristics is used for solving the technical problem that a combinatorial explosion exists in an existing part manufacturability automatic analysis method in a process that an optional solution is generated. According to the technical scheme of the identification method for the three-dimensional CAD model intersection manufacture characteristics, a three-dimensional CAD model expressed by model based definition (MBD) is used as an information input source, firstly a reachability analysis is conducted on each machined face through an illumination-type rule, and the axial space of a feasible cutter of each machined face is ascertained; then with the axial space of the feasible cutter of each machined face as a restraint, a machined face clustering algorithm merging a manufacture semanteme is adopted to construct each of machined area subgraphs; and finally, with each machined area subgraph as a manufacture characteristic trace which is combined together with dimensioning information, the machined area subgraphs are optimized and merged, so that identification of the manufacture characteristics is achieved. According to the identification method for the three-dimensional CAD model intersection manufacture characteristics, the manufacturability analysis is merged in the identification process of the intersection manufacture characteristics, so that the machined faces are identical in the accuracy level. In the characteristic identification process, the influence, on the characteristic identification, of the design semanteme is fully considered and practicality is improved.

An optical proximity correction method and a method for making a mask plate. The correction method includes: performing OPC correction on a sub-target figure to obtain an initial correction figure; performing several first simulation exposures on the initial correction figure to obtain a number of The first simulated exposure pattern; obtain the detection mark position in each first simulated exposure pattern, the size of the figure corresponding to the detection mark position in the direction of the feature size is outside the first threshold range; according to the figure corresponding to the detection mark position in the feature size The size of the direction and the first threshold range are corrected at least once on the initial correction figure corresponding to the position of the detection mark to obtain the correction figure. The crafting window for correction graphics has been increased.

The invention discloses a forming method of a large-diameter thin-walled stainless steel barrel. The method includes the following steps that firstly, groove pre-bending and machining are conducted; secondly, stainless steel plates are hoisted to tool supports and fixed to the tool supports; thirdly, turnover is conducted; fourthly, assembling and longitudinal joint welding are conducted; fifthly, weld joint correction is conducted; and sixthly, the tool supports are detached. By means of the large-diameter thin-walled stainless steel barrel formed through the method, hoisting difficulty can be eliminated, ferrite pollution is avoided, the barrel does not need to be overturned, and it is ensured that the circular degree of the barrel meets the process design requirement.

A hybrid integrated circuit module and its manufacturing method, the manufacturing method comprising: making a substrate, a heat sink, and a glass fiber board with through holes at preset positions, and covering one surface of the substrate with an insulating layer; The glass fiber board and the radiator are arranged on the surface of the insulating layer; the circuit wiring layer is arranged on the surface of the glass fiber board; power elements and non-power elements are respectively arranged on the radiator and corresponding positions of the circuit wiring layer; Metal wires are connected between the circuit wiring layer, the heat sink, the power element, and the non-power element. Improve the contact reliability of the bonding point, shorten the length of the bonding line and reduce the height difference of the bonding line can effectively reduce the probability of line punching during molding, so that the manufacturing pass rate and long-term reliability of the intelligent power module are improved. promote.

A semiconductor device and its forming method, wherein the method includes: forming a dielectric layer on a semiconductor substrate and a fin, the dielectric layer has a groove exposing the fin, and the groove includes a first groove region exposing part of the fin and the second groove area exposing part of the fin, the direction from the center of the first groove area to the center of the second groove area is perpendicular to the extending direction of the fin; forming a first work function layer on the fin at the bottom; forming a first covering layer in the first groove area of ​​the trench, the first covering layer being located on the first work function layer of the first groove area and exposing the second groove area The first work function layer of the second groove area is etched and removed with the first cover layer as a mask; after the first work function layer of the second groove area is etched and removed, the second groove of the trench A second covering layer is formed in the region; the second covering layer and the first covering layer are removed by etching. The method improves the performance of semiconductor devices.

A semiconductor device and a method for forming the same, wherein the method includes: providing a semiconductor substrate with initial fins on the semiconductor substrate; forming a gate structure material layer on the semiconductor substrate and the initial fins, the gate The top surface of the pole structure material layer is higher than the top surface of the initial fin; a groove is formed in the gate structure material layer and the initial fin, and the groove is along a direction perpendicular to the extending direction of the initial fin and parallel to the semiconductor substrate. The direction of the bottom surface runs through the initial fin so that the initial fin forms a fin; an isolation layer is formed in the groove, the top surface of the isolation layer is higher than the top surface of the fin; and the gate structure material is etched layer, so that the gate structure material layer forms a gate structure on both sides of the isolation layer, the gate structure straddles the fin and covers part of the top surface and part of the sidewall surface of the fin. The method improves the isolation performance of the semiconductor device.