1930 results about "Ultra high speed" patented technology

An apparatus for processing a substrate with a plasma. The apparatus includes first and second electrodes positioned with a spaced apart relationship. A separating ring has a vacuum-tight engagement with confronting surfaces of the first electrode and the second electrode to define an evacuatable processing region therebetween. Communicating with the processing region is a process gas port for introducing a process gas to the processing region. The processing region may be evacuated through a vacuum port defined in one of the first and second electrodes to a pressure suitable for exciting a plasma from the process gas in the processing region when the first and second electrodes are powered.

A ultra high speed photonic Analog to Digital Converted (ADC) for sampling and quantizing an electrical voltage signal, internally enabled by photonics uses coherent optical detection architectures for photonic quantization. Coherent light is phase modulated by the test signal. Using an interferometer, or an array of interferometers the phase of modulated light is compared with a reference light. Flash ADC, successive approximation ADC and delta-sigma ADC configurations are presented.

The invention discloses semitrailer-mounted turbine fracturing equipment. Straight-line connection and special chassis design of the whole equipment can double reduce center of gravity of the equipment, stability and safety are better ensured, the structure is simpler, the investment cost and the operation cost are lowered, risks of the whole breakdown of fracturing sites are reduced, transmissionis better, and the semitrailer-mounted turbine fracturing equipment is suitable for continuous operation working conditions with long time and large load. By improving a plunger pump, optimization ofrotating center distances of a crank throw and a crankshaft makes rated power input of the crank throw and the crankshaft increase to 5000-7000 hp, optimization of the transmission ratio of an integrated reduction gearbox on the plunger pump makes the maximum input speed of the integrated reduction gearbox reach 16000 rpm, and ultra-high speed enables reduction gearboxes to be directly connectedwith a turbine engine so as to the solve the problems that turbine fracturing equipment slows down depending on the two reduction gearboxes, and weight of the whole semitrailer is reduced, and boundary dimension of the semitrailer-mounted turbine fracturing equipment is reduced.

As no single wireless network can provide both broadband high-speed radio transmission and seamless full mobility for commercial wireless communications in terms of technology, cost, spectrum and performance, a new wireless converged network access infrastructure based on Open Wireless Architecture (OWA) has been disclosed, wherein the spectrum is separated into low spectrum band (LSB) for wide area seamless mobility networks and high spectrum band (HSB) for very high-speed broadband wireless access systems in order to maximize the spectrum utilization efficiency for the converged multiple wireless access networks of the fully service-oriented wireless communications including multimedia broadcast and multicast service.

Systems and methods for transmitting data, including encoding one or more streams of input data using one or more adaptive Low Density Parity Check (LDPC) encoders, wherein the encoders generate one or more signal constellations; modulate one or more signals using hybrid multidimensional coded modulation; apply orthogonal prolate spheroidal wave functions as electrical basis functions; generate one or more spectral band group signals by selecting and combining two or more spectral band groups with center frequencies that are orthogonal to each other; and spectral-mode-multiplex and transmit the one or more adaptive LDPC-coded data streams including the one or more spectral band group signals combined into corresponding spatial modes over a transmission medium.

The invention provides a traveling wave direction pilot protection method, which comprises the following steps of: respectively acquiring a wave head polarity of a current fault initial traveling wave and an initial polarity of a power frequency component in a voltage fault traveling wave at the first side of the high voltage transmission line, and respectively acquiring a wave head polarity of a current fault initial traveling wave and an initial polarity of a power frequency component in a voltage fault traveling wave at a second side of the high voltage transmission line; comparing a wave head polarity of a current fault initial traveling wave with an initial polarity of a power frequency component in a voltage fault traveling wave at a local side so as to determine a fault direction at the local side; and exchanging information of a fault direction at the first side with information of a fault direction at the second side, comparing the information of the fault directions between the two sides, judging whether the high voltage transmission line has an internal fault and determining whether to carry out the operation of relay protection. The invention also provides a traveling wave direction pilot protection device and a traveling wave direction pilot protection system, which can be applied to the high voltage transmission line and can rapidly and accurately detect the fault and the type of the fault and carry out protection operation.

The present invention provides parallel, cable based robotic manipulators, for use in different applications such as ultra high-speed robots or positioning devices with between three to six degrees of freedom. The manipulators provide more options for the number of degrees of freedom and also more simplicity compared to the current cable-based robots. The general structure of these manipulators includes a base platform, a moving platform or end effector, an extensible or telescoping central post connecting the base to moving platform to apply a pushing force to the platforms. The central post can apply the force by an actuator (active), or spring or air pressure (passive) using telescoping cylinders. The robotic manipulators use a combination of active and passive tensile (cable) members, and collapsible and rigid links to maximize the benefits of both pure cable and conventional parallel mechanisms. Different embodiments of the robotic manipulators use either active cables only, passive cables only, or combinations of active and passive cables. An active cable is one whose length is varied by means of a winch. A passive cable is one whose length is constant and which is used to provide a mechanical constraint. These mechanisms reduce the moving inertia significantly to enhance the operational speed of the robots. They also provide a simpler, more cost effective way to manufacture parallel mechanisms for use in robotic applications.

A dispersion compensation controlling apparatus used in a very high-speed optical communication system adopting optical time division multiplexing system comprises a first specific frequency component detecting unit (2a) detecting a first specific frequency component in a baseband spectrum in a transmission optical signal inputted to a receiving side over a transmission fiber as a transmission line (6a), a first intensity detecting unit (3a) detecting information on an intensity of the first specific frequency component detected by the first specific frequency component detecting unit (2a), and a polarization-mode dispersion controlling unit (220a) controlling a polarization-mode dispersion quantity of the transmission line (6a) such that the intensity of the first specific frequency component detected by the first intensity detecting unit (3a) becomes the maximum, thereby easily detecting and compensating polarization-mode dispersion generated in a high-speed optical signal.

Various circuit techniques for implementing ultra high speed circuits use current-controlled CMOS (C3MOS) logic fabricated in conventional CMOS process technology. An entire family of logic elements including inverter / buffers, level shifters, NAND, NOR, XOR gates, latches, flip-flops and the like are implemented using C3MOS techniques. Optimum balance between power consumption and speed for each circuit application is achieve by combining high speed C3MOS logic with low power conventional CMOS logic. The combined C3MOS / CMOS logic allows greater integration of circuits such as high speed transceivers used in fiber optic communication systems. The C3MOS structure enables the use of a power supply voltage that may be larger than the voltage required by the CMOS fabrication process, further enhancing the performance of the circuit.

The invention relates to the technical field of terahertz spectrums, in particular to a graphene-based all-optically controlled ultra-high speed terahertz intensity modulator. The technical problems of low modulation speed and narrow spectrum range of the conventional terahertz intensity modulator are solved, and the application range of a system is widened. According to the graphene-based all-optically controlled ultra-high speed terahertz intensity modulator, gold nanoparticles are adopted, so that the photon absorption efficiency of graphene is enhanced, the concentration of photon-generated carriers is improved, the absorption of terahertz waves is further enhanced, and the modulation effect of the modulator is enhanced. The graphene-based all-optically controlled ultra-high speed terahertz intensity modulator comprises a terahertz wave generation device, a pumping light wave generation device, a terahertz intensity modulator and a terahertz wave detection device, which are connected to finish the design of the graphene-based all-optically controlled ultra-high speed terahertz intensity modulator. The graphene-based all-optically controlled ultra-high speed terahertz intensity modulator is mainly applied to the fields of terahertz communication systems and terahertz researches.

A UV curing system and method for providing an adjustable beam profile are disclosed for UV curing for ultra high speed industrial applications, such inkjet printing, with improved print quality and efficiency. Also provided is a lamp head assembly for a UV source for such a system, which provides an adjustable beam profile for optimizing UV curing. The lamp head assembly comprises one or more light sources and reflectors or other optical elements, which may be relatively movable and adjustable, to adjust the beam profile to processing conditions and requirements for consistent curing efficiency and print quality at different print speeds. Specific features of such a lamp head assembly may permit adjustment of the spectral, spatial and temporal distribution of light for improved or optimized curing efficiency in ultra-fast UV curing applications.

A silicon and silicon germanium based semiconductor MODFET device design and method of manufacture. The MODFET design includes a high-mobility layer structure capable of ultra high-speed, low-noise for a variety of communication applications including RF, microwave, sub-millimeter-wave and millimeter-wave. The epitaxial field effect transistor layer structure includes critical (vertical and lateral) device scaling and layer structure design for a high mobility strained n-channel and p-channel transistor incorporating silicon and silicon germanium layers to form the optimum modulation-doped heterostructure on an ultra thin SOI or SGOI substrate capable of achieving greatly improved RF performance.

A single end supported single-frame magnetic-levitation torque-controlling gyro is composed of magnetically levitated rotor system and frame system. Said magnetically levitated rotor system consists of gyro rotor, axial and radial magnetic bearings, and axial and radial displacement sensors, protecting bearing, drive motor and gyro room. Said frame system comprises frame jointer, end covers, mandrel, torque motor, angular position sensor, electrically conductive slide ring, mechanical bearing, and base. It has high rotation speed and long service life.

An FPGA-based ultrahigh-speed industrial controller comprises a main control unit, an FPGA independent power supply unit, a JTAG debugging interface circuit, an EPCS16 program configuration circuit, a clock input and automatic / manual reset circuit unit, a conditioning board power supply unit, a 16-path analog quantity input A / D conversion unit, an eight-path analog quantity output D / A conversion unit, a switch quantity input signal isolation and conditioning unit, a switch quantity output signal isolation and drive unit, an RS232 / half / full-duplex RS485 / RS422 bus communication unit, 16 paths of industrial site switch quantity input, an upper computer or an access industrial network. According to the FPGA-based ultrahigh-speed industrial controller, only one FPGA is used as a main control chip to complete analog quantity and switch quantity acquisition and control of an industrial control system. The FPGA-based ultrahigh-speed industrial controller has the most prominent features of high speed and ultrahigh speed and has the advantages of low cost, good versatility, high stability, good reliability, field programmability and strong expansion capability and the like.

The invention discloses a distributed ultrahigh-speed disturbance quantitative detection method. Ultrahigh-speed disturbance detection can be realized through a time division multiplexing method; and phase demodulation is carried out through phase demodulation methods such as Hilbert transformation and orthogonal transformation so as to be able to realize real-time detection on the disturbance position, frequency and amplitude. The invention further discloses a distributed ultrahigh-speed disturbance quantitative detection device, which comprises a pulse generator, a laser, a first coupler, a pulse modulator, an erbium-doped optical fiber amplifier, a circulator, an optical fiber sensing unit, a second coupler, a balance detector, a band-pass filter, a power amplifier and a data acquisition card. According to the invention, the repetition frequency of detecting light pulses is improved through a time division multiplexing technology, so that a reflecting grating based phi-OTDR system is enabled to realize ultrahigh-speed disturbance detection; and real-time detection for the disturbance position, frequency and amplitude is realized through the phase demodulation method by using a coherent detection structure and combining a phase unwrapping algorithm.

The invention provides particle reinforced iron-based alloy powder for ultra-high speed laser cladding. The iron-based alloy powder is composed of iron matrix metal powder and oxide particles or carbide particles and comprises 50-98% of iron matrix metal powder and 2-50% of oxide particles or carbide particles, wherein an iron matrix is composed of, by mass, 0.03-2% of C, 0.50-2.80% of Si, 0.30-1.60% of Mn, 2-12% of Cr, 0.5-3% of V, 0.5-4% of Mo, 0.3-1% of Nb, less than or equal to 0.030% of P, less than or equal to 0.030% of S, 0.05-3.0% of B and the balance Fe and inevitable impurities. Theparticle size of the metal power is 10-100 microns, and the flowability of the metal power is 32-45 s / 100 g. By adopting the particle reinforced iron-based metal powder, the laser cladding technologyis adopted and matched with different processes for reinforcing and repairing matrix surfaces.

A bridge fault modeling and simulation apparatus including a neural network simulates the effects of bridge defects in complementary metal oxide semiconductor integrated circuits. The apparatus includes a multilayer feedforward neural network (MLFN), implemented within the framework of a very high speed integrated circuit hardware description language (VHDL) saboteur. The saboteur is placed between logic cells in the IC simulation. The apparatus computes exact bridged node voltages and propagation delay times with due attention to surrounding circuit elements. It results in faster simulation and achieves excellent accuracy.

An ultra high-speed semiconductor device has a high-K dielectric gate insulator layer, wherein spread of impurities to a Si substrate from a gate electrode through the high-K dielectric gate insulator layer, and spread of oxygen and metallic elements from the high-K dielectric gate insulator layer to the Si substrate or the gate electrode are suppressed by arranging the high-K dielectric film sandwiched by nitrogen atomic layers on the Si substrate that is covered by an oxygen atomic layer.

The invention discloses a hybrid type dynamic-pressure gas thrust bearing. The hybrid type dynamic-pressure gas thrust bearing comprises two outer plates, wherein an inner plate is clamped between the two outer plates; a foil type elastic part is arranged between each outer plate and the inner plate; groove type patterns with regular shapes are arranged on the two end surfaces of the inner plate; and the groove type patterns on one end surface and the groove type patterns on the other end surface form mirror symmetry. The hybrid type dynamic-pressure gas thrust bearing provided by the invention not only has rigid characteristics of high-limit rotation speed of a groove type dynamic-pressure gas thrust bearing, but also has flexible characteristics of high impact resistance and high loading capacity of a foil piece type dynamic-pressure gas thrust bearing, so that the application, in the ultra-high speed field under relatively large load, of the dynamic-pressure gas thrust bearing can be satisfied.

A decoder performs forward error correction based on quasi-cyclic regular column-partition low density parity check codes. A method for designing the parity check matrix reduces the number of short-cycles of the matrix to increase performance. An adaptive quantization post-processing technique further improves performance by eliminating error floors associated with the decoding. A parallel decoder architecture performs iterative decoding using a parallel pipelined architecture.

Various circuit techniques for implementing ultra high speed circuits use current-controlled CMOS (C3MOS) logic fabricated in conventional CMOS process technology. An entire family of logic elements including inverter / buffers, level shifters, NAND, NOR, XOR gates, latches, flip-flops and the like are implemented using C3MOS techniques. Optimum balance between power consumption and speed for each circuit application is achieve by combining high speed C3MOS logic with low power conventional CMOS logic. The combined C3MOS / CMOS logic allows greater integration of circuits such as high speed transceivers used in fiber optic communication systems. The C3MOS structure enables the use of a power supply voltage that may be larger than the voltage required by the CMOS fabrication process, further enhancing the performance of the circuit.

The invention relates to an ultra high-speed optical analog-to-digital conversion device. The ultra high-speed optical analog-to-digital conversion device comprises a high-speed pulse laser, a frequency spectrum broadening module, a repetition frequency multiplication module, an ultra wide band signal sampling module, a wavelength multi-channelizing module, parallel photoelectric conversion modules, parallel electric quantization modules and parallel data processing modules, wherein the high-speed pulse laser, the frequency spectrum broadening module, the repetition frequency multiplication module, the ultra wide band signal sampling module, the wavelength multi-channelizing module, the parallel photoelectric conversion modules, the parallel electric quantization modules and the parallel data tprocessing modules are sequentially connected. According to the ultra high-speed optical analog-to-digital conversion device, the high-speed pulse laser and the wavelength-division multiplexing technology are combined, while the advantages that the wavelength-division multiplexing technology is simple and practicable are kept, the defect that the output frequency spectrum of an active mode-locking fiber laser is narrow is overcome through the frequency spectrum broadening technology, high-speed photoelectric sampling is carried out through a broadband 1*2 electro-optical modulator, and by increasing the number of wavelength-division multiplexing channels or the number of parallel channels of the system, the bandwidth of a photoelectric detector and the sampling rate of an electric analog-to-digital converter are not increased while the sampling rate of the system is improved.

Various circuit techniques for implementing ultra high speed circuits use current-controlled CMOS (C3MOS) logic fabricated in conventional CMOS process technology. An entire family of logic elements including inverter / buffers, level shifters, NAND, NOR, XOR gates, latches, flip-flops and the like are implemented using C3MOS techniques. Optimum balance between power consumption and speed for each circuit application is achieve by combining high speed C3MOS logic with low power conventional CMOS logic. The combined C3MOS / CMOS logic allows greater integration of circuits such as high speed transceivers used in fiber optic communication systems. The C3MOS structure enables the use of a power supply voltage that may be larger than the voltage required by the CMOS fabrication process, further enhancing the performance of the circuit.

A ultra high speed photonic Analog to Digital Converted (ADC) for sampling and quantizing an electrical voltage signal, internally enabled by photonics uses coherent optical detection architectures for photonic quantization. Coherent light is phase modulated by the test signal. Using an interferometer, or an array of interferometers the phase of modulated light is compared with a reference light. Flash ADC, successive approximation ADC and delta-sigma ADC configurations are presented.

An optical network packet classification architecture is disclosed that addresses the packet classification requirements for OC-768 optical routers and beyond. The herein disclosed system is used for ultra-high speed packet classification of optical data at either the serial data stream level for maximum performance, or after it has been converted into parallel words of data. The presently preferred embodiment of the invention provides a system that operates in the receive path, where electronic data are provided by the optical interface to the data framer. The invention incorporates unique features into a traditional optical data framer chip and relies on a complex ASIC to permit the user to differentiate between up to 10,000 different patterns at ultra-high speeds. One purpose of the general purpose system disclosed herein is to eliminate the need for costly and power consumptive content addressable memory systems, or customer pattern specific ASICs, to perform network packet classification. The system operates on a principle of adaptive programmable randomization to permit a differentiation between the input vectors to be made. The invention dramatically reduces the processing burden required by high-speed optical routers or switches.

The invention provides a method and a system thereof for measuring the time of exposure of a door-control type image intensifier, which are suitable for measuring the time of exposure of various ultra-high speed photoelectric cameras adopting the door-control type image intensifier as a shutter. The method adopts picosecond (ps) pulsed laser for illumination, n times n pieces of optical fibers thelength of which is distributed in an equidifferent way form a laser array with n times n points in the way of delay, the laser array is regarded as a shoot target and is imaged on the door-control type image intensifier by an objective lens, the door-control type image intensifier outputs an image, the image is coupled with a CCD camera, the CCD camera records the quantity of the shot laser arraypoints, the space number of the laser points is calculated and then times time interval so as to obtain the time of exposure of the door-control type image intensifier. The invention can be directlyused for marking the time of exposure of ultra-high speed photoelectric framing cameras, and has broad application prospect in the field of researching the door-control type image intensifier as wellas in the measurement of time of exposure of the ultra-high speed photoelectric framing cameras.

The present invention is related to a digital video recording method, and in particular, when a recording mode is audio detection, according to an audio signal transmitted from a mike mounted on a camera or a mike mounted separately, this method records the video taken by said camera during the time period for which a recording speed and video resolution is already set as super-high speed and high video resolution. After the elapse of an already set time period, when the audio signal is sensed, this method records the video by varying the recording speed and video resolution from super-high speed and high video resolution into low-speed and low video resolution at a time interval which is already set. Therefore, it becomes possible to obtain the specific information about the video data which is important in an unmanned security system.

The invention provides an ultra-high speed aircraft thermal protection and drag reduction method and system. The method includes that a cold source is arranged inside the cavity of an ultra-high speed aircraft, a plurality of micropores are arranged in the wall surface of the cavity, and the cold source is ejected out of the micropores in a high-pressure air state under the action of driving force to form an air film on the outer surface of the cavity. The air film can perform thermal protection on the ultra-high speed aircraft, viscous drag of the aircraft with external air can be effectively reduced, thermal barrier is favorably alleviated or eliminated, security of the ultra-high speed aircraft is improved, service life is prolonged, and a good application prospect is achieved. A cold source driving unit comprising an air pump, a cold source storer and a buffer is adopted in the system, the air pump supplies compressed air to the cold source storer during the operation state, the cold source enters the buffer to be vaporized under the action of air pressure, and the air is ejected from the micropores to form the air film under the action of pressure.

An optical network packet classification architecture is disclosed that addresses the packet classification requirements for OC-768 optical routers and beyond. The herein disclosed system is used for ultra-high speed packet classification of optical data at either the serial data stream level for maximum performance, or after it has been converted into parallel words of data. The presently preferred embodiment of the invention provides a system that operates in the receive path, where electronic data are provided by the optical interface to the data framer. The invention incorporates unique features into a traditional optical data framer chip and relies on a complex ASIC to permit the user to differentiate between up to 10,000 different patterns at ultra-high speeds. One purpose of the general purpose system disclosed herein is to eliminate the need for costly and power consumptive content addressable memory systems, or customer pattern specific ASICs, to perform network packet classification. The system operates on a principle of adaptive programmable randomization to permit a differentiation between the input vectors to be made. The invention dramatically reduces the processing burden required by high-speed optical routers or switches.