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2880results about "Analogue conversion" patented technology

Hybrid polar/cartesian digital modulator

A novel apparatus and method for a hybrid Cartesian / polar digital QAM modulator. The hybrid technique of the present invention utilizes a combination of an all digital phase locked loop (ADPLL) that features a wideband frequency modulation capability and a digitally controlled power amplifier (DPA) that features interpolation between 90 degree spaced quadrature phases. This structure is capable of performing either a polar operation or a Cartesian operation and can dynamically switch between them depending on the instantaneous value of a metric measured by a thresholder / router. In this manner, the disadvantages of each modulation technique are avoided while the benefits of each are exploited.
Owner:TEXAS INSTR INC

Method and apparatus for implementing a class D driver and speaker system

An audio path is constructed to include a multi-bit sigma-delta converter for converting an N-bit digital input to an n-bit output representing an over-sampled, lower resolution n-bit version of the N-bit digital input; a formatter for converting the n-bit output to an m signal output (e.g., as a thermometer code, a SDM format or a PWM format); an m-by-m switching matric for receiving the m output signals and for reordering the m output signals, m class-D drivers individual ones of which are driven by one of the reordered m output signals for driving one of m speakers; and a dynamic element matching (DEM) block coupled to the switching matric for controlling the reordering of the m output signals driving the m class-D drivers for spreading the distortion due at least to driver-speaker pair mismatch to wide band noise. The DEM may operate to generate white noise, or it may generate shaped (colored) noise.
Owner:NOKIA CORP

Power efficient, high bandwidth communication using multi-signal-differential channels

A low-power, area and pin efficient signaling alternative to serial differential links used for chip-to-chip, backplane, optical and other signaling applications. The multi-bit differential signaling (MBDS) generally comprises a driver and link termination network design coupled with a coding system based on n choose M (nCm) coding. MBDS has comparable electrical characteristics to conventional low-voltage differential signaling (LVDS) and is fully compatible with existing LVDS receivers in point-to-point and multi-point bus topologies. However, MBDS uses up to 40% less power, with up to 33% fewer I / O pads than equivalent LVDS links.
Owner:PITTSBURGH UNIV OF

Ultra-high-speed photonic-enabled ADC based on multi-phase interferometry

A ultra high speed photonic Analog to Digital Converted (ADC) for sampling and quantizing an electrical voltage signal, internally enabled by photonics uses coherent optical detection architectures for photonic quantization. Coherent light is phase modulated by the test signal. Using an interferometer, or an array of interferometers the phase of modulated light is compared with a reference light. Flash ADC, successive approximation ADC and delta-sigma ADC configurations are presented.
Owner:TECHNION RES & DEV FOUND LTD

Smart radio incorporating Parascan(R) varactors embodied within an intelligent adaptive RF front end

A smart radio incorporating Parascan® varactors embodied within an intelligent adaptive RF front end. More specifically, this is provided for by a smart radio incorporating Parascan® varactors embodied within an intelligent adaptive RF front end that comprises at least one tunable antenna; at least one antenna null steering facility associated with said at least on tunable antenna; at least one tunable duplexer receiving the output from and providing input to said at least one antenna null steering facility; a first tunable RF filter receiving the output from said at least one tunable duplexer and providing the input to an analog to digital converter, said analog to digital converter providing the input to a digital signal processor, the output of which is input for a digital to analog converter; a second tunable RF filter receiving the analog output of said digital to analog converter and providing an input to said at least one tunable duplexer.
Owner:NXP USA INC

Signal processing system with analog-to-digital converter using delta-sigma modulation having an internal stabilizer loop

A signal processing system includes an analog-to-digital delta sigma modulator with a duty cycle modulator and a finite impulse response (FIR) filter in a main loop feedback path of the delta sigma modulator. The duty cycle modulator and FIR filter can provide high performance filtering in the main loop feedback path. To prevent instability in the main loop caused by the duty cycle modulator and FIR filter, the delta sigma modulator also includes a stabilizer loop. Transfer functions of the main loop and the stabilizer loop combine to achieve a target transfer function for the analog-to-digital delta sigma modulator that provides for stable operation of the analog-to-digital delta sigma modulator.
Owner:CIRRUS LOGIC INC

Lossless coding method for waveform data

In a method of lossless processing of an integer value signal in a prediction filter which includes a quantiser, a numerator of the prediction filter is implemented prior to the quantiser and a denominator of the prediction filter is implemented recursively around the quantiser to reduce the peak data rate of an output signal. In the lossless processor, at each sample instant, an input to the quantiser is jointly responsive to a first sample value of a signal input to the prediction filter, a second sample value of a signal input to the prediction filter at a previous sample instant, and an output value of the quantiser at a previous sample incident. In a preferred embodiment, the prediction filter includes noise shaping for affecting the output of the quantiser.
Owner:DOLBY LAB LICENSING CORP

Low-delay signal processing based on highly oversampled digital processing

A low-delay signal processing system and method are provided which includes a delta-sigma analog-to-digital converter, an oversampling processor, and a delta-sigma digital-to-analog converter. The delta-sigma analog-to-digital converter receives an input or audio signal and generates a digital sample signal at a high oversampling rate. The oversampling processor is connected to the analog-to-digital converter for processing the digital sample signal at the high oversampling rate with low-delay. The delta-sigma digital-to-analog converter is connected to the oversampling processor for receiving the digital sample signal at the high oversampling rate with low-delay for generating an analog signal. The oversampling processor includes a low-delay filter and a programmable delay element. In this manner, the analog signal is produced with a low delay and high accuracy.
Owner:CIRRUS LOGIC INC

Parallel, adaptive delta sigma ADC

An apparatus performs adaptive analog-to-digital conversion. The apparatus according to one embodiment comprises a frequency modulator unit for changing an input analog signal into a modulated analog signal with a frequency spectrum in a bandwidth of interest, a parallel delta sigma conversion unit operatively connected to the frequency modulator unit, the parallel delta sigma conversion unit converting the modulated analog signal into a digital signal, and a controller operatively connected to the frequency modulator unit and the parallel delta sigma conversion unit, the controller adjusting at least one parameter relating to a frequency characteristic of the frequency modulator unit and / or the parallel delta sigma conversion unit.
Owner:NORTHROP GRUMAN CORP

Embedding supplemental data in an encoded signal, such as audio / video watermarks

Method of embedding watermarks in a signal encoded by an encoder having a feedback loop, for example, a sigma-delta modulator (21,22,23). A digital watermark pattern (w) is embedded in the signal (z) by modifying selected samples (for example, replacing every 100th bit) of the encoded signal (y) by samples of the watermark pattern. The circuit (24) for modifying the samples is located inside the loop of the encoder. The effect of watermarking is thus compensated in subsequent encoding steps and the signal-to-noise ratio is only slightly affected.
Owner:U S PHILIPS CORP

Down-converter and up-converter for time-encoded signals

The disclosed invention provides apparatus and methods that can convert frequencies of time-encoded signals. In one aspect, a down-converter circuit includes low-pass filters, a switch, a time encoder, and an output low-pass filter. In another aspect, an up-converter circuit includes an analog or digital input time encoder, low-pass filters, a switch, an output time encoder, and a time-encoded band-pass filter. In yet another aspect, a complete receiver system is provided. The receiver system can operate effectively with signals in the radio frequency range.
Owner:HRL LAB

Adaptive, intelligent transform-based analog to information converter method and system

The present invention provides an adaptive, intelligent transform based Analog to Information Converter (AIC) for wideband signals by directly converting an analog signal to information (e.g., features, decisions). This direct conversion is achieved by (i) capturing most of the information of a wideband signal via hardware / software implemented mathematical transformations, (ii) effectively removing unwanted signals such as jammer and interfere from the input signal, and (iii) using novel algorithms for highly accurate decision making and feature extraction (e.g., high probability of detection with low probability of false alarm). The jump in the improvement over today's state-of-the-art is in terms of effective and optimum signal information extraction at high-speed.
Owner:HRL LAB

Transformer-isolated analog-to-digital converter (ADC) feedback apparatus and method

A transformer-isolated analog-to-digital converter (ADC) feedback apparatus and method provides reduction of circuit complexity in high power / high voltage systems having a transformer-isolated sensing circuit. The feedback apparatus is a circuit including an ADC for receiving an analog input signal and a transformer having a first winding that receives a modulated output of the analog-to-digital converter. A second winding of the transformer provides an isolated data output of the ADC. A demodulator is coupled to the second winding of the transformer and demodulates the isolated output to generate a digital representation of the analog input signal. The ADC may be a delta-sigma converter and the demodulator may be the corresponding decimation filter. The circuit further includes an isolation circuit for introducing a clock signal and / or power supply waveform at the second winding of the transformer, so that the ADC circuit is supplied with an isolated clock and / or an isolated power supply.
Owner:CIRRUS LOGIC INC

Feedback topology delta-sigma modulator having an ac-coupled feedback path

A feedback topology delta-sigma modulator having an AC-coupled feedback path reduces signal level in the loop filter, easing linearity requirements and reduces capacitor size requirements for the filter integration stages. The delta-sigma modulator includes a loop filter having multiple integrator stages, a quantizer, and a feedback network providing at least two feedback paths to corresponding integrators in the loop filter. In one aspect, only one of the feedback paths from the quantizer output is DC coupled, and at least one other of the feedback paths is DC-coupled, which reduces the signal levels in the loop filter integrators. In another aspect, at least one of the feedback paths from the quantizer is AC coupled, providing a similar result. The AC feedback path may be provided through a series-connected resistor and capacitor. The DC feedback path may be provided through a resistor, a switched-capacitor network, or may be a quantizer-controlled current source.
Owner:CIRRUS LOGIC INC

Signaling dependent adaptive analog-to-digital converter (ADC) system and method of using same

An adaptive analog-to-digital converter (ADC) system (100) includes an automatic gain control (AGC) controller (101) for receiving both in-band and out-of-band signals from a radio frequency (RF) receiver and producing an AGC control signal therefrom. A digital signal processor (DSP) (103) is then used for interpreting the AGC control signal and providing an adjustment signal to an ADC (105). The ADC (105) uses the adjustment signal to dynamically control efficiency of the ADC system 100 by adjusting bit resolution, reference capacitance and bias based upon the RF signal received and desired protocol requirements presented to the AGC controller (101).
Owner:NORTH STAR INNOVATIONS +1

Transmitter for wireless applications incorporation spectral emission shaping sigma delta modulator

A transmitter employing a sigma delta modulator having a noise transfer function adapted to shift quantization noise outside at least one frequency band of interest. A technique is presented to synthesize the controllers within a single-loop sigma delta modulator such that the noise transfer function can be chosen arbitrarily from a family of functions satisfying certain conditions. Using the novel modulator design technique, polar and Cartesian (i.e. quadrature) transmitter structures are supported. A transmitter employing polar transmit modulation is presented that shapes the spectral emissions of the digitally-controlled power amplifier such that they are significantly and sufficiently attenuated in one or more desired frequency bands. Similarly, a transmitter employing Cartesian transmit modulation is presented that shapes the spectral emissions of a hybrid power amplifier such that they are significantly and sufficiently attenuated in one or more desired frequency bands.
Owner:TEXAS INSTR INC

Programmable power control system

A power control system includes a switching power converter and a programmable power factor correction (PFC) and output voltage controller. The programmable PFC and output voltage controller generates a control signal to control power factor correction and voltage regulation of the switching power converter. In at least one embodiment, the control signal is a pulse width modulated signal. The programmability of the PFC and output voltage controller provides the programmable PFC and output voltage controller flexibility to operate in accordance with programmable parameters, to adapt to various operating environments, and to respond to various operating exigencies. In at least one embodiment, the programmable PFC and output voltage controller includes a state machine to process one or more programmable, operational parameters to determine the period and pulse width states of the control signal.
Owner:CIRRUS LOGIC INC

Adaptive spectral noise shaping to improve time to digital converter quantization resolution using dithering

A novel and useful apparatus for and method of improving the quantization resolution of a time to digital converter in a digital PLL using noise shaping. The TDC quantization noise shaping scheme is effective to reduce the TDC quantization noise to acceptable levels especially in the case of integer-N channel operation. The mechanism monitors the output of the TDC circuit and adaptively generates a dither (i.e. delay) sequence based on the output. The dither sequence is applied to the frequency reference clock used in the TDC which adjusts the timing alignment between the edges of the frequency reference clock and the RF oscillator clock. The dynamic alignment changes effectively shape the quantization noise of the TDC. By shaping the quantization noise, a much finer in-band TDC resolution is achieved resulting in the quantization noise being pushed out to high frequencies where the PLL low pass characteristic effectively filters it out.
Owner:TEXAS INSTR INC

Highly linear analog-to-digital conversion system and method thereof

A highly linear analog-to-digital (ADC) conversion system has an analog front-end device in cascade with a standard ADC converter, and a tunable digital non-linear equalizer. The equalizer corrects the quantization distortion, deviations from ideal response, and additive noises generated by the analog front-end device and ADC converter. The equalizer is formed by three main parts: Generate Function Streams Unit, Finite Impulse Response FIR filters and a summer. The equalizer receives the unequalized output from the ADC converter and generates a plurality of monomial streams in a systolic fashion. Each of the monomial streams is passed through a corresponding linear finite impulse response FIR filter. A convolution sum of all outputs from the FIR filters produces a unique equalized output with the non-linear distortion reduced to a satisfactory level. The FIR filter coefficients are determined by an Identity Equalizer Coefficient Unit, and a Test Signal Generator with different types of test signals. The FIR filter coefficients are set to minimize an error function.
Owner:MASSACHUSETTS INST OF TECH

Signal processing apparatus and signal processing method

Disclosed herein is a signal processing apparatus including: analog-to-digital conversion means for performing delta sigma modulation of generating a digital signal having a predetermined sampling frequency and a predetermined quantization bit rate of one or more bits based on an input analog signal; signal processing means including a digital filter having a characteristic for outputting a digital signal having a sampling frequency n×Fs (Fs is a reference sampling frequency) and a quantization bit rate of a bits (a is a natural number greater than one) based on the above digital signal; and digital-to-analog conversion means including a part for performing delta sigma modulation for outputting a digital signal having a sampling frequency n×Fs and a quantization bit rate of b bits (b is a natural number greater than zero and less than a) based on a digital signal outputted from the signal processing means.
Owner:SONY CORP
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