2924 results about "Loop filter" patented technology

A delta-sigma modulator comprising a first quantizer providing a first digital signal d0(k) representing the input signal g(t); a loop filter with input signal paths; a loop quantizer providing a corrective digital signal d1(k) representing the loop filter's output signal y(t); an array of feedback DACs D/A converting the sum d(k)=df(k)=d0(k)+d1(k) of the first and the corrective digital signals and injecting feedback signals into the loop filter.The loop filter's input node is applied the difference of the input signal g(t) and the global analog feedback signal a3(t). The global feedback signal a3(t) is delayed several clock cycles with respect to the digital output signal d(k). The delay is used to carry out mismatch-shaping and deglitching algorithms in the feedback DACs. The feedback DACs' different delays and gain coefficients are designed such that the modulator is stable. The filter's input signal paths and the compensating DAC are designed such that the gain from the input signal g(t) to the loop quantizer is small, ideally zero. Thus, the loop quantizer's resolving range can be a fraction of the first quantizer's resolving range, whereby the output signal's d(k) resolution can be much higher than the individual resolutions of d0(k) and d1(k).The delta-sigma modulator is well suited for the implementation of high-resolution wide-bandwidth A/D converters. Important applications include digital communication systems.

A method and apparatus for sharing information in a video coding system are disclosed. Embodiments according to the present invention use an information sharing flag to determine whether to share in-loop filter information in the picture level. The information sharing flag may be incorporated in the sequence level, the picture level or the slice level to indicate whether information sharing is enabled. Multiple information sharing flags may also be used to adaptively control information sharing. Furthermore, method and apparatus of using multiple Adaptation Parameter Sets (APSs) for information sharing of in-loop filters are disclosed. APS identifiers of in-loop filters may be incorporated in the slice header to allow each of the in-loop filters select respective filter information from the multiple APSs. A flag is incorporated in SPS to indicate whether multiple APS or single APS is used. Various exemplary syntax designs are disclosed to illustrate information sharing.

In an implantable medical device, a frequency synthesizer employed in the RF transceiver of the IMD operating system functions in a PLL LOCK mode wherein the VCO frequency is governed by the PLL and an energy saving HOLD mode wherein the PLL is not operational and the VCO generated carrier frequency can drift over time. The PLL circuit is powered up and coupled with a control voltage input and the output of the VCO to develop a frequency control voltage stored by a capacitive loop filter during initial LOCK portions of both uplink and downlink telemetry transmission time periods. A frequency modulation (FM) input of the VCO receives data bit modulation voltages that modulates the carrier frequency during uplink transmission of patient data. During the HOLD portion of a downlink telemetry transmission, an AFC algorithm is enabled and derives a frequency correction value from the difference in frequency of the constant received carrier frequency and the drifting VCO generated carrier frequency, and the frequency correction value is applied to the VCO FM input to compensate for loop filter capacitor discharge of the control voltage causing the drift. The AFC algorithm derived frequency correction value is stored in memory and is also applied during the HOLD portion of an uplink telemetry transmission to the VCO FM input to compensate for loop filter capacitor discharge of the control voltage causing the drift. In addition, a recharge current is applied to the capacitive loop filter.

A Global Navigation Satellite System (GNSS) receiver and associated method capable of tracking weak GNSS signals from a plurality of GNSS satellites. In a preferred embodiment, code and carrier tracking loops are initially closed around the code phase, carrier frequency, and data bit edge estimates handed over from an acquisition mode. In subsequent tracking, early, prompt, and late copies of the code replica are correlated with the incoming signal. The prompt correlations are coherently integrated over an extended updating interval for data bit edge and sign estimation as well as for carrier phase and frequency error discrimination whereas the early and late correlations are used for code error discrimination. Code delay and carrier phase and frequency errors are used to update the code and carrier tracking loop filters. Together with data bits, they form observables of a GNSS signal's time and frequency parameters for timing and position fixing.

A loop-filtering method for reducing quantization effect generated when an image data is encoded and decoded, and an apparatus therefor. The loop-filtering method includes the steps of extracting a flag indicating whether the image data requires loop-filtering using the distribution of inverse quantized coefficients (IQCs) of an inverse quantized image data and a motion vector indicating the difference between the previous frame and the current frame. The image data corresponding to the flag is then filtered by a predetermined method if the extracted flag indicates a need for the loop-filtering. Using the flags and an adaptive filter reduces the quantization effect and is useful to reduce the amount of computation required for the filtering. Also, the filtering can be performed through parallel processing without multiplication and division, so that the complexity of hardware can be reduced.

A de-blocking filter processing apparatus that achieves high picture quality without consuming processing apparatus power unnecessarily. A loop filter 170 used as a de-blocking filter processing apparatus first acquires a variable-size motion estimation block in a frame for which motion estimation processing is performed. Then, de-blocking filter processing is applied adaptively to a frame for which motion estimation processing is performed, in accordance with the acquired motion estimation block. Application of de-blocking filter processing is executed only at a boundary between a particular motion estimation block and a motion estimation block adjacent to that motion estimation block in a frame for which motion estimation processing is performed.

Disclosed is an encoding/decoding method and apparatus related to adaptive deblocking filtering. There is provided an image decoding method performing adaptive filtering in inter-prediction, the method including: reconstructing, from a bitstream, an image signal including a reference block on which block matching is performed in inter-prediction of a current block to be encoded; obtaining, from the bitstream, a flag indicating whether the reference block exists within a current picture where the current block is positioned; reconstructing the current block by using the reference block; adaptively applying an in-loop filter for the reconstructed current block based on the obtained flag; and storing the current block to which the in-loop filter is or is not applied in a decoded picture buffer (DPB).

The present invention is a system and a method that controls the current limit such that it is maintained within a small range for any acceptable input voltages, e.g., 90 to 264 Volts RMS, causes the output voltage of a PWM controller to drop as the output load increases so as to maintain a constant current output, and does cycle by cycle calculation compensating for the V_IN ripple output from the bridge and bulk filter capacitor so that no loop filter is required in the constant current mode.

In one embodiment of the present invention there is provided a method of filtering blood flow in a lumen by positioning an open loop filter support structure within a lumen; maintaining a position of the open loop filter support structure within the lumen using radial force generated by the open loop filter support structure; and filtering blood flow in the lumen using a filter supported by the open loop filter support structure. In one aspect, there is also applying radial force generated by the open loop filter support structure along the axial dimension of the lumen. In another embodiment of the present invention there is provided a method of providing a filter across a lumen flow path by providing a filter support structure having a first end, a crossover section, and a second end; and fixing the position of the filter support structure within the lumen by positioning the first end against a first portion of the lumen and positioning the second end against a second portion of the lumen; and using the filter support structure to provide a filter across the lumen flow path. In one aspect, the ends do not pierce the lumen surface.

A feedback topology delta-sigma modulator having an AC-coupled feedback path reduces signal level in the loop filter, easing linearity requirements and reduces capacitor size requirements for the filter integration stages. The delta-sigma modulator includes a loop filter having multiple integrator stages, a quantizer, and a feedback network providing at least two feedback paths to corresponding integrators in the loop filter. In one aspect, only one of the feedback paths from the quantizer output is DC coupled, and at least one other of the feedback paths is DC-coupled, which reduces the signal levels in the loop filter integrators. In another aspect, at least one of the feedback paths from the quantizer is AC coupled, providing a similar result. The AC feedback path may be provided through a series-connected resistor and capacitor. The DC feedback path may be provided through a resistor, a switched-capacitor network, or may be a quantizer-controlled current source.

A class AD audio amplifier system (10) with improved recovery from clipping events is disclosed. The amplifier system (10) includes multiple audio channels (20), each of which can be constructed to include a pulse-width-modulator (PWM) (24). The PWM modulator (24) includes a pair of comparators (39A, 39B; 52+, 52−) that generate complementary PWM output signals based upon the comparison between a filtered difference signal and a reference waveform. Clip detection logic (26) is provided to detect clipping at the output of the channel (20), preferably by detecting successive edges of the reference waveform without an intervening edge of a PWM output signal. In response to detecting clipping, a first integrator (30; 45) is reset to remove residuals and to eliminate the first integrator (30; 45) from the loop filter of the modulator (24). A saturation level circuit (35) applies a clamping voltage, preferably in both clipping and non-clipping situations, to a second integrator (36; 47). As a result, the loop filter is prevented from entering extreme conditions during clipping, which greatly reduces the clipping recovery time.

A video processing method and a related device for processing blocking artifacts between two blocks within a video picture uses loop filtering and compares two boundary edge pixels at both sides of a boundary between two blocks according to at least one perceptual threshold to determine if pixel values of the two boundary edge pixels should be adjusted to decrease the difference corresponding to the pixel values of the two boundary edge pixels.

An object of this invention is to provide a phase synchronizing circuit capable of automatically adjusting a VCO such that the VCO satisfies a predetermined frequency range even in a frequency range in which the VCO oscillates by a leak current generated if a low threshold process is applied. The phase synchronizing circuit is composed of a PLL consisting of a phase comparator, a charge pump, a loop filter, a VCO, and a divider, and a calibration circuit for automatically adjusting a frequency range of the VCO. Before a convergence operation is started, a switch is closed in response to a signal Rst of the calibration circuit such that an output of the loop filter is leveled to the ground and the PLL is set to be an open loop. A VCO output Fo is set at an upper limit frequency or a lower limit frequency in response to a Vcal signal, and its frequency is measured by comparing its period with a period of a reference signal Fr, and signals Hb, Lb used for adjusting the frequency of the VCO are updated. The signals Hb, Lb are updated until the VCO satisfies the predetermined frequency range, and subsequently their values are maintained. The switch opens in response to the signal Rst, and the PLL is changed over to a close loop to start phase synchronization.

A method and apparatus for in-loop processing of reconstructed video are disclosed. The method and apparatus configure the in-loop processing so that the processing requires no pixel or reduced pixels from other side of a virtual boundary. When the in-loop processing of the to-be-processed pixel requires a pixel from the other side of the virtual boundary, the pixel from the other side of the virtual boundary is replaced by a replacement pixel. The in-loop processing can also be configured to skip the pixel when the processing requires a pixel from other side of the virtual boundary. The in-loop processing can also be configured to change ALF filter shape or filter size when the in-loop processing requires a pixel from other side of the virtual boundary. A filtered output can be combined linearly or nonlinearly with the to-be-processed pixel to generate a final filter output.

In a QAM demodulator including an adaptive equalizer, a method of carrier tracking comprising the following steps is disclosed: (A) sampling a QAM signal received from a transmission channel; (B) recovering a symbol clock function from the sampled QAM signal; (C) applying the sampled QAM signal to the adaptive equalizer in order to obtain a QAM equalized signal in a Blind Equalization (BE) mode; (D) using a slicer to locate a nearest plant point for the QAM Blind equalized signal for each recovered symbol clock; (E) using a complex conjugate multiplier to obtain an instantaneous inphase component and an instantaneous quadrature component of a phase angle error signal; (F) using a linear phase detector to obtain an instantaneous phase angle error for each symbol clock; (G) averaging the instantaneous phase angle error signal by using a carrier loop filter; (H) using a complex multiplier to insert an inverse of the averaged phase angle error signal into the QAM Blind equalized signal to compensate for the carrier phase angle error; and (I) repeating the steps (D-H) to close a carrier frequency loop.

Disclosed are an encoding device and a decoding device, which include a CNN-based in-loop filter. The encoding device according to one embodiment comprises: a filtering unit for generating filtering information by filtering a residual image corresponding to a difference between an original image and a prediction image; an inverse filtering unit for generating inverse filtering information by inversely filtering the filtering information; a prediction unit for generating the prediction image on the basis of the original image and reconstruction information; a CNN-based in-loop filter for receiving the inverse filtering information and the prediction image so as to output the reconstruction information; and an encoding unit for performing encoding on the basis of the filtering information and information of the prediction image.