The invention relates to the field of integrated circuits, and provides a technical scheme of a TSPC trigger, so that a new TSPC circuit has data keeping ability, and the circuit structure runs in a high speed circuit to keep the integrity of the data. The technical scheme adopted in the invention is as follows: the TSPC trigger with a data keeping feedback circuit is composed of 8 PMOS tubes, which are respectively P1, P2, P3, P4, P5, P6, P7, P8; 7 NMOS 7 tubes, which are respectively N1, N2, N3, N4, N5, N6, N7 and 3 inverters INV1, INV2, INV3. The TSPC trigger is mainly applied to the design and manufacture of integrated circuits.