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TSPC trigger with data keeping feedback circuit

A feedback loop and data retention technology, which is applied in the direction of pulse generation, electrical components, and electric pulse generation, can solve problems such as circuit function impact and data loss, and achieve the effect of integrity assurance

Inactive Publication Date: 2017-12-29
TIANJIN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If the traditional TSPC circuit structure is used, data loss will occur at low level, which will greatly affect the function of the circuit

Method used

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Embodiment Construction

[0010] Because the traditional TSPC flip-flop circuit structure is in a high-speed circuit, if the clock is a low-level clock and data loss occurs after a period of time, the present invention has carried out certain innovations on the basis of the traditional TSPC flip-flop, so that the new TSPC circuit It has the ability to maintain data, so that the circuit structure can maintain the integrity of data when running in high-speed circuits.

[0011] The structural circuit diagram of the novel TSPC flip-flop proposed by the present invention is as follows: figure 1 shown. The novel TSPC flip-flop proposed by the present invention has 8 PMOS tubes, which are respectively P1, P2, P3, P4, P5, P6, P7, P8; and 7 NMOS tubes are respectively N1, N2, N3, N4, N5, N6, N7 and three inverters INV1, INV2, INV3. The connection relationship of each component of the present invention is as follows: the gate of PMOS transistor P1 is connected to the input signal D, the drain is connected to t...

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Abstract

The invention relates to the field of integrated circuits, and provides a technical scheme of a TSPC trigger, so that a new TSPC circuit has data keeping ability, and the circuit structure runs in a high speed circuit to keep the integrity of the data. The technical scheme adopted in the invention is as follows: the TSPC trigger with a data keeping feedback circuit is composed of 8 PMOS tubes, which are respectively P1, P2, P3, P4, P5, P6, P7, P8; 7 NMOS 7 tubes, which are respectively N1, N2, N3, N4, N5, N6, N7 and 3 inverters INV1, INV2, INV3. The TSPC trigger is mainly applied to the design and manufacture of integrated circuits.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to high-speed digital circuit design. Specifically, it relates to a TSPC flip-flop with a data-hold feedback loop. Background technique [0002] In digital circuits, the D flip-flop is a very important circuit structure, which is often used in circuit structures such as frequency dividers and data recovery. The general TSPC circuit structure consists of nine transistors, and is often used in high-speed circuit structures. Now due to the reduction of process size, the speed of digital circuit operation has increased a lot. If the traditional TSPC circuit structure is used, data loss will occur at low level, which will greatly affect the function of the circuit. On the basis of the traditional nine-tube circuit structure, the present invention adds a data holding feedback loop to the output, so that there is a data holding loop when the level is low, ensuring the integrity of the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K3/356
CPCH03K3/356
Inventor 高静周游徐江涛史再峰聂凯明
Owner TIANJIN UNIV
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