659results about "Line balance variation compensation" patented technology

A transceiver includes a switching unit configurable for isolating an input of a receiver from an output of a transmitter during a local calibration mode. A known signal present at the output at a first power level during the calibration mode will also be present at the input at a second power level lower than the first power level and will be converted by the quadrature demodulator. A compensation factor is estimated for compensating the receiver section for imbalances in the in-phase and quadrature phase signals resulting from conversion of the known signal. Remote calibration is implemented using a method for remotely compensating for I-Q imbalance wherein a data packet having a known signal is transmitted to a receiver for conversion by a quadrature demodulator and compensation factors are estimated for compensating for imbalances in the in-phase and quadrature phase signals resulting from conversion of the known signal.

A differential radio frequency signal transmitter is provided. The differential radio frequency signal transmitter includes an oscillator, a modulator and an amplifier module. The oscillator generates a pair of differential oscillation signals. The modulator generates a pair of differential modulated signals according to an input signal and the pair of differential oscillation signals. The input signal is a digital signal. When the input signal is at a first state, the modulator outputs the pair of differential oscillation signals as the pair of differential modulated signals, and when the input signal is at a second state, the modulator outputs a constant voltage signal as the pair of differential modulated signals. The amplifier module receives and amplifies the pair of differential modulated signals and generates a pair of differential radio frequency signals, accordingly.

Methods and apparatuses for reducing DC offsets in a communication system are described. In a first aspect, a feedback loop circuit reduces DC offset in a wireless local area network (WLAN) receiver channel. The frequency response of the feedback loop circuit can be variable. In a second aspect, a circuit provides gain control in a WLAN receiver channel. First and second automatic gain control (AGC) amplifiers are coupled in respective portions of the receiver channel. Circuits for monitoring DC offset, and for providing control signals for controlling the frequency response of the DC offset reducing circuits are also provided.

A DSL or other communication system includes a modem or other communication device having at least one antenna that is configured to collect interference data relating to interference noise affecting communication signals being received by the communication device. The interference may include RF interference, such as AM radio interference, crosstalk and other types of interference from various sources. The interference data collected by the antenna is used by an interference canceller to remove and / or cancel some or all of the interference affecting received signals. In some embodiments of the present invention, more than one antenna may be used, wherein each antenna can collect interference data pertaining to a single source of interference noise. Where a modem or other communication device is coupled to multiple telephone lines, only one of which is being used as the active DSL line, wires in the remaining telephone lines or loops can be used as antennas. Moreover, the antenna may be an antenna, per se, such as a compact AM radio antenna or any other suitable structure or device for collecting the type(s) of interference affecting signals received by the communication device.

An optical transmission network includes an optical transmitter photonic integrated circuit (TxPIC) chip, utilized in an optical transmitter and has a plurality of monolithic modulated sources integrated for multiple signal channels on the same semiconductor chip is provided with channel equalization at the optical receiver side of the network that permits one or more such integrated modulated sources in the TxPIC chip to be out of specification thereby increasing the chip yield and reducing manufacturing costs in the deployment of such TxPIC chips. FEC error counts at the FEC decoder on the optical receiver side of the network includes counters that accumulate a plurality of bit pattern-dependent error counts based on different N-bit patterns in the received data bit stream. The accumulated counts of different N-bit patterns are utilized to provide for corrections to threshold and phase relative to the bit eye pattern as well as provided for weight coefficients for the optical receiver equalization system. The deployment of this type of equalization in a digital OEO REGEN network substantially reduces, if not eliminates, the need for dispersion compensating fiber (DCF) or EDFAs in an optical link of the network and enhances the optical receiver tolerance to chromatic dispersion (CD) so that an increase in chip yield is realized for TxPIC chips not operating with acceptable operational parameters, particularly with a desired frequency chirp parameter relative to at least one of the TxPIC modulated sources.

A receiving section for digital television broadcasting and a receiving section for analog television broadcasting are provided. When a digital television broadcasting program is selected, it is judged whether or not an analog television broadcasting program having the same contents as those of the selected digital television broadcasting program is being broadcast. In a case where the analog television broadcasting program having the same contents as those of the selected digital television broadcasting program is being broadcast, when the digital television broadcasting program cannot be received, the analog television broadcasting program having the same contents as those of the selected digital television broadcasting program is received and outputted.

An embodiment of the proposed invention is primarily applied to compensate the BLW in communication systems using THPs in their transmitters, especially suitable for the 10GBase-T Ethernet application. The present apparatus includes an additional decision device (slicer) used to generate DC offset information (error signal) and an extra modulus unit after our BLW compensator to reconvert compensated symbols to correct 16-PAM signals. In addition, the estimated error signals in our method are generated from the difference between the input of the BLW compensator and the output of the decision device. These error signals are then weighted to alleviate the impact of erroneous DC offset information on the performance of the BLW compensator. Therefore, a more direct and accurate DC offset information can be derived to improve the inaccurate BLW estimation in previous works.

The invention discloses a process for re-transmitting single frequency signals and a single frequency signal repeater, where coupling occurs between the transmitting antenna and the receiving antenna, and where the process is of the type used in a single frequency signal repeater and comprises the steps of: [a] receiving a first radio frequency signal having a particular receiving power, [b] optionally converting said first radio frequency signal into a process signal, [c] filtering, amplification and automatically controlling the gain of said signal, [d] canceling said coupling between said transmitting antenna and said receiving antenna, [e] reconverting, as the case may be, said process signal into a second radio frequency signal, [f] amplifying the power of said second radio frequency signal, [g] output filtering, and [g] transmission.

An apparatus and method for allowing two different signal paths to be coupled to a multi-tap transformer balun. The multi-tap transformer has a first port, which is coupled to a single antenna, and two or more differential secondary ports. Each port has one or more taps, which are optimized separately for each of the signal paths, allowing each of the two or more signal paths to operate in different frequency bands. Use of the method of the invention can decrease the number of external components and integrated circuit package pins, and reduce the area required for each signal path on an integrated circuit die, a printed circuit board, or the like.

A DC offset estimator and removal circuit removes the DC offsets for each of the I and Q signal components in a received signal. A gain imbalance estimator and compensator circuit estimates and compensates for gain imbalances within the I and Q signal components. A phase imbalance estimator and compensator circuit estimates and compensates for phase imbalances within the I and Q signal components to produce a communications signal that is compensated for received DC offsets and gain and phase imbalances within the I and Q signal components.

There are provided, as a low noise amplifier (70) a low noise amplifier (71) with a low gain and a low noise amplifier (72) with a high gain, selectively operable under control of a bias current, and an output from the low noise amplifier (72) and a quadrature demodulator (80) are connected with a serial capacitance (73) and also an output from the low noise amplifier (71) and the quadrature demodulator (80) are serially connected. A control section (66) controls a reception circuit so that the low noise amplifier (71) operates when a reception signal level is high and the low noise amplifier (72) operates when the reception signal level is low. When the low noise amplifier (72) operates, a DC bias current thereof is made flow separately from a DC bias current of the quadrature demodulator (80), and, when the low noise amplifier (71) operates, a DC bias current thereof is shared with the quadrature demodulator.