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1096results about How to "Improve data throughput" patented technology

Firmware socket module for FPGA-based pipeline processing

A firmware socket module is deployed on a reconfigurable logic device, wherein the firmware socket module has a communication path between itself and an entry point into a data processing pipeline, wherein the firmware socket module is configured to provide both commands and target data to the entry point in the data processing pipeline via the same communication path, wherein each command defines a data processing operation that is to be performed by the data processing pipeline, and wherein the target data corresponds to the data upon which the data processing pipeline performs its commanded data processing operation. Preferably, the firmware socket module is configured to provide the commands and target data in a predetermined order that is maintained throughout the data processing pipeline. Also, the firmware socket module may be configured to (1) access an external input descriptor pool buffer that defines the order in which commands and target data are to be provided to the data processing pipeline, and (2) transfer the commands and target data from an external memory to the data processing pipeline in accordance with the identified defined order. Results of the processing by the data processing pipeline are also returned to external memory by the firmware socket module, whereupon those results can be subsequently used by software executing on a computer system.
Owner:IP RESERVOIR

Dual packet configuration for wireless communications

A dual packet configuration for wireless communications including a first portion that is modulated according to a serial modulation and a second portion that is modulated according to a parallel modulation. The serial modulation may be DSSS whereas the parallel modulation may be OFDM. The first portion may include a header, which may further include an OFDM mode bit and a length field indicating the duration the second portion. The first portion may be in accordance with 802.11b to enable dual mode devices to coexist and communicate in the same area as standard 802.11b devices. The dual mode devices can communicate at different or higher data rates without interruption from the 802.11b devices. The packet configuration may include an OFDM signal symbol which further includes a data rate section and a data count section. In this manner, data rates the same as or similar to the 802.11a data rates may be specified between dual mode devices. The first and second portions may be based on the same or different clock fundamentals. For OFDM, the number of subcarriers, pilot tones and guard interval samples may be modified independently or in combination to achieve various embodiments. Also, data subcarriers may be discarded and replaced with pilot tones for transmission. The receiver regenerates the discarded data based on received data, such as using ECC techniques.
Owner:CISCO TECH INC

Ethernet network availability

Disclosed is a method and apparatus for improving LAN availability and robustness employing adjacency status self-discovery on segment-to-segment communications paths. In some embodiments, the method and system may employ Logical Link Control Type 1 test frame messages between segment nodes to determine status. Adjacent node status may be determined by waiting a period of time for an acknowledgment message and marking the tested link as “down” if no response is received. Also disclosed is a method for compacting data transmitted over a network to reduce overhead.
Owner:GENBAND US LLC

Multiport-RAM memory device

The invention relates to a multiport-RAM memory device, comprising a RAM memory unit (1), a number of serial / parallel converters (5, 6, 7) and a parallel / serial converter (10), for converting serial signals into parallel signals. Said multiport-RAM memory device further comprises a control unit (11) and two timeslot allocation devices (8, 9), whereby an emulation of a number of connections by using the simple RAM memory unit (1) may be achieved. Furthermore, a power controller (12) can significantly reduce the power demand.
Owner:NOKIA SOLUTIONS & NETWORKS GMBH & CO KG

Using an embedded indication of egress application type to determine which type of egress processing to perform

A multi-service segmentation and reassembly (MS-SAR) integrated circuit is disposed on a line card in a router or switch. The MS-SAR can operate in an ingress mode so that it receives packet and / or cell format data and forwards that data to either a packet-based or a cell-based switch fabric. The MS-SAR can also operate in an egress mode so that it receives data from either a packet-based or a cell-based switch fabric and outputs that data in packet and / or cell format. The MS-SAR has a data path through which many flows of different traffic types are processed simultaneously. Each flow is processed by functional blocks along the data path in accordance with one of several application types, the application type for a flow being predetermined by the host processor of the router or switch. Segmentation, reassembly and partitioning techniques are disclosed that reduce costs and facilitate high-speed operation.
Owner:MARVELL ASIA PTE LTD

Image classification method based on semi-supervised self-paced learning cross-task deep network

The invention discloses an image classification method based on a semi-supervised self-paced learning cross-task deep network. The method includes the steps of randomly selecting a small amount of labeling samples from the whole image data set, reserving the labels, and remaining all the samples as unlabelled samples having the real labels to be unknown in the whole process, wherein the weight ofthe labeled samples is constant to be one in the training process, the weight of the unlabelled samples is initialized to be zero, and only the labeled samples are used as a training set in the initial process; S2, training a cross-task deep network by the training set; S3, according to the trained cross-task deep network, predicting the pseudo labels of all the unlabelled samples, and giving a corresponding weight of each unlabelled sample; S4, according to a self-paced learning normal form, selecting an unlabelled sample with a high confidence degree, and adding to the training set; and S5,repeating the steps S2-S4 until the cross-task deep network performance is saturated or reaches a preset cycle number. According to the method, the human design feature is not needed to be input, andthe classification can be realized by directly inputting the original image.
Owner:SOUTH CHINA UNIV OF TECH

System and method for performing high-speed communications over fiber optical networks

Processing a received optical signal in an optical communication network includes equalizing a received optical signal to provide an equalized signal, demodulating the equalized signal according to an m-ary modulation format to provide a demodulated signal, decoding the demodulated signal according to an inner code to provide an inner-decoded signal, and decoding the inner-decoded signal according to an outer code. Other aspects include other features such as equalizing an optical channel including storing channel characteristics for the optical channel associated with a client, loading the stored channel characteristics during a waiting period between bursts on the channel, and equalizing a received burst from the client using the loaded channel characteristics.
Owner:SOTO ALEXANDER I +1
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