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18748 results about "Power supply voltage" patented technology

A power supply converts the Alternating Current (AC) electricity coming from your wall outlet into four voltage types that your computer commonly uses, all Direct Current (DC) power: - 5 volts, +5 volts, +12 volts and -12 volts.

Amperage control for protection of battery over current in power tools

Amperage control of a power tool motor is provided by pulse width modulation of current from a power supply. The pulse width modulation may be varied according to the determined motor current and measured power supply voltage. The power supply preferably includes a battery, such a lithium ion or nickel cadmium.
Owner:BLACK & DECKER INC

Analyte sensing apparatus for hospital use

A system is provided for monitoring blood glucose data of a patient. The system includes a sensing device and hospital monitor. The sensing device includes a sensor and sensor electronics and is adapted to transmit information to the hospital monitor while continuing to sense blood glucose data. The communication between the sensing device and the hospital monitor may be wireless. The sensor electronics may include a sensor power supply, a voltage regulator, and optionally a memory and processor.
Owner:MEDTRONIC MIMIMED INC

Sensing system with auxiliary display

A system is provided for sensing blood glucose data of a patient. The system includes a sensor, user interface, and an optional auxiliary device. If the connection between the sensor and user interface is by a wire, the sensor remains powered when the wire is disconnected. The communication between the sensor and the user interface may be wireless. The auxiliary device can be a patient monitor or other display or signal device, which displays information about the blood glucose data collected by the sensor. The sensor is connected to sensor electronics, which include a sensor power supply, a voltage regulator, and optionally a memory and processor.
Owner:MEDTRONIC MIMIMED INC

Refrigeration monitor unit

A control unit is attached to or embedded within a refrigeration appliance to monitor electric power voltage and / or frequency supplied by the mains. If the unit detects a sag or peak in either the voltage or frequency, the control unit either separates any high demand elements of the appliance from the mains to reduce demand in a sag or energizes the elements in a peak. When the control system separates the refrigeration compressor from the mains, a food spoilage monitoring system monitors the food storage compartments. This system utilizes food industry temperature and time algorithms to ensure the food does not spoil. If food spoilage could occur, the unit re-energizes the compressor to allow it to lower the temperature provided the power is sufficient to operate the compressor unit without damaging it. Once the sensed temperature is restored to a safe level, the unit separates the compressor from the mains.
Owner:RANCO OF DELAWARE

Medical implant having closed loop transcutaneous energy transfer (TET) power transfer regulation circuitry

An implantable medical device, such as a bi-directional infuser device for hydraulically controlling an artificial sphincter (e.g., adjustable gastric band) benefits from being remotely powered by transcutaneous energy transfer (TET), obviating the need for batteries. In order for active components in the medical device to operate, a sinusoidal power signal received by a secondary coil is rectified and filtered. An amount of power transferred is modulated. In one version, a voltage comparison is made of a resulting power supply voltage as referenced to a threshold to control pulse width modulation (PWM) of the received sinusoidal power signal, achieving voltage regulation. Versions incorporate detuning or uncoupling of the secondary coil to achieve PWM control without causing excessive heating of the medical device.
Owner:ETHICON ENDO SURGERY INC

Semiconductor memory device having improved local input/output line precharge scheme

ActiveUS8213248B2Preventing bit line disturbanceRun at high speedDigital storageBit lineDatapath circuits
A data path circuit of a semiconductor memory device includes: a bit line sense amplifier driven by a first power supply voltage; a local input / output line sense amplifier; a column selecting unit operatively connecting a pair of bit lines connected to the bit line sense amplifier and a pair of local input / output lines connected to the local input / output line sense amplifier in response to a column selection signal; and a local input / output line precharge unit precharging the pair of local input / output lines with a second power supply voltage different from the first power supply voltage during a period for which the column selection signal is in an inactive state.
Owner:SAMSUNG ELECTRONICS CO LTD

Semiconductor device and power receiving device

InactiveUS20080210762A1Deterioration of with time can be preventedCommunication distanceNear-field transmissionCircuit arrangementsSignal processing circuitsElectrical battery
An object is to provide a semiconductor device that is capable of wireless communication, such as an RFID tag, which can transmit and receive individual information without checking remaining capacity of a battery or changing batteries due to deterioration with time in the battery for a drive power supply voltage, and maintain a favorable a transmission / reception state even when electric power of an electromagnetic wave from a reader / writer is not sufficient. The semiconductor device includes a signal processing circuit, a first antenna circuit connected to the signal processing circuit, an antenna circuit group, a rectifier circuit group and a battery connected to the signal processing circuit. The first antenna circuit transmits and receives a signal for transmitting data stored in the signal processing circuit and drives a power supply circuit, and each antenna circuit of the antenna circuit group receives a signal for charging the battery and includes an antenna which has a different corresponding frequency.
Owner:SEMICON ENERGY LAB CO LTD

Method and apparatus for power throttling in a microprocessor using a closed loop feedback system

A method and apparatus for power throttling in a microprocessor. A voltage source supplies voltage to the microprocessor, and a clock source operates the microprocessor at a desired frequency. In one embodiment, a power monitor is configured to measure the short term power consumption of the microprocessor. In another embodiment, a temperature sensor measures the temperature of the microprocessor. Control logic is coupled to the voltage source and the clock source. The control logic receives an indication of the power consumption or temperature, as applicable, and compares it to a predetermined value. In response to the comparison, the control logic varies the supply voltage and the frequency.
Owner:INTEL CORP

System and method for generating a mask layout file to reduce power supply voltage fluctuations in an integrated circuit

A system and method for generating a mask layout file to reduce power supply voltage fluctuations in an integrated circuit are disclosed. The method includes analyzing a pattern in a mask layout file to identify a region in the pattern to add one or more decoupling capacitors. Once the region is identified, a feature located in the identified region is moved based on a design rule from a first position to a second position in the mask layout file to create a space in the identified region. The decoupling capacitors are automatically placed in the space in the identified region.
Owner:CELERICS TECH

Storage subsystem with embedded circuit for protecting against anomalies in power signal from host

A storage subsystem includes a charge pump that receives a power signal from a host system, and generates a regulated power signal that is provided to the storage subsystem's controller. When the power signal from the host is interrupted, the charge pump additionally acts as a backup power supply to enable the storage subsystem to continue to operate temporarily, and power isolation circuitry in the storage subsystem prevents power from flowing back to the host system. The storage subsystem further includes a digitally programmable voltage detection circuit that accepts various supply voltages and asserts a busy signal to the controller when an anomaly in the power signal is detected. The controller includes logic circuitry that will block the host system from performing write operations to the storage subsystem either when the voltage detection circuit asserts a busy signal or when the controller is busy executing memory operation commands.
Owner:WESTERN DIGITAL TECH INC

Current driven memory cells having enhanced current and enhanced current symmetry

A method and system for providing and using a magnetic memory is described. The method and system include providing a plurality of magnetic storage cells. Each magnetic storage cell includes a magnetic element and a selection device coupled with the magnetic element. The magnetic element is programmed by write currents driven through the magnetic element in a first or second direction. In one aspect, the method and system include providing a voltage supply and a voltage pump coupled with the magnetic storage cells and the voltage supply. The voltage supply provides a supply voltage. The voltage pump provides to the selection device a bias voltage having a magnitude greater than the supply voltage. Another aspect includes providing a silicon on oxide transistor as the selection device. Another aspect includes providing to the body of the transistor a body bias voltage that is a first voltage when the transistor is off and a second voltage when the transistor is on.
Owner:SAMSUNG SEMICON

Photomask for reducing power supply voltage fluctuations in an integrated circuit and integrated circuit manufactured with the same

A photomask for reducing power supply voltage fluctuations in an integrated circuit and integrated circuit manufactured by the same are disclosed. The photomask includes a substrate and a patterned layer formed on at least a portion of the substrate. The patterned layer may be formed using a mask pattern file created by analyzing a pattern in a mask layout file to identify a region in the pattern to add one or more decoupling capacitors. Once the region is identified, a feature located in the identified region is moved based on a design rule from a first position to a second position in the mask layout file to create a space in the identified region. The decoupling capacitors are placed in the space in the identified region.
Owner:CELERICS TECH

High-Efficiency Envelope Tracking Systems and Methods for Radio Frequency Power Amplifiers

Envelope tracking (ET) methods and systems for controlling the delivery of power to radio frequency power amplifiers (RFPAs). An exemplary ET system includes an RFPA and a wide bandwidth capable and power efficient envelope modulator that includes a first power supplying apparatus and a second power supplying apparatus. The first power supplying apparatus includes a switch-mode converter and a regulator. The first mode converter is operable to dynamically step down a fixed power supply voltage according to amplitude variations in an envelope signal received by the regulator, and use the resulting dynamic power supply signal to power the regulator. The second power supplying apparatus is connected in parallel with the first power supplying apparatus. Depending on a power of an output signal to be generated at an output of the power amplifier, power is supplied to the power amplifier from either or both of the first and second power supplying apparatuses.
Owner:APPLE INC

Semiconductor memory device

Cell power supply lines are arranged for memory cell columns, and adjust impedances or voltage levels of the cell power supply lines according to the voltage levels of bit lines in the corresponding columns, respectively. In the data write operation, the cell power supply line is forced into a floating state according to the bit line potential on a selected column and has the voltage level changed, and a latching capability of a selected memory cell is reduced to write data fast. Even with a low power supply voltage, a static semiconductor memory device that can stably perform write and read of data is implemented.
Owner:RENESAS ELECTRONICS CORP

Area efficient implementation of small blocks in an SRAM array

An SRAM array and a dummy cell row structure is discussed that permits an SRAM array to be divided into segments isolated by a row pattern of dummy cells. The dummy cell structure avoids the use of special OPC conditions at the power supply line and block boundaries by providing a continuous cell array at the lower cell patterning levels in an area efficient implementation. In one implementation, the SRAM array comprises a first and second array block each comprising an SRAM cell having a first layout configuration, one or more of the dummy cells having a second layout configuration arranged along the row pattern associated with a wordline of the SRAM array, a first power supply voltage line connected to the first array block, and a second different power supply voltage line connected to the second array block. The first and second power supply voltage lines of the array blocks are further connected to the one or more dummy cells. Beneficially, the bitlines of the array may be continuous across the first and second array blocks and a dummy cell associated therewith.
Owner:TEXAS INSTR INC

Semiconductor integrated circuit

To reduce power consumption of a semiconductor integrated circuit and to reduce delay of the operation in the semiconductor integrated circuit, a plurality of sequential circuits included in a storage circuit each include a transistor whose channel formation region is formed with an oxide semiconductor, and a capacitor whose one electrode is electrically connected to a node that is brought into a floating state when the transistor is turned off. By using an oxide semiconductor for the channel formation region of the transistor, the transistor with an extremely low off-state current (leakage current) can be realized. Thus, by turning off the transistor in a period during which power supply voltage is not supplied to the storage circuit, the potential in that period of the node to which one electrode of the capacitor is electrically connected can be kept constant or almost constant. Consequently, the above objects can be achieved.
Owner:SEMICON ENERGY LAB CO LTD

Double-gate low power SOI active clamp network for single power supply and multiple power supply applications

A double-gated low power active clamp circuit for digital circuits includes a first double-gated MOSFET serially connected between an upper power supply voltage and an input terminal to be clamped, and a second double-gated MOSFET serially connected between a lower voltage power supply and the input terminal. The voltages at the gates of the first and second double-gated MOSFETs are held at constant reference voltages by a single or double reference circuits. The clamping action can be switched on or off. The double-gated active clamping network can be implemented with a single power supply voltage, or with multiple power supply voltages. The use of the back gates of the double-gated active clamping network enables additional clamping and ESD protection for smaller generations of transistors, such as, those having dimensions below 0.1 micron. The device is particularly suited for use with dynamic threshold double-gated silicon-on-insulator, FINFET, and bulk triple well technologies.
Owner:GLOBALFOUNDRIES US INC

Light emitting display, light emitting display panel, and driving method thereof

A driving transistor for outputting a current for driving an organic electroluminescent (EL) element is formed on a pixel circuit of an organic EL display. A first capacitor is coupled between a power supply voltage and a gate of the driving transistor, and a second capacitor is coupled between the gate and a scan line. First a voltage matched with a data current is stored in the first capacitor in response to a select signal from the scan line. The voltage of the first capacitor is changed by variation of the select signal's voltage level. A driving current is output from the transistor because of the changed voltage of the first capacitor, and the organic EL element emits light as a result of the driving current.
Owner:SAMSUNG DISPLAY CO LTD

Display apparatus and method of driving same

Disclosed herein is a display apparatus including a pixel array and a driver configured to drive the pixel array, the pixel array having scanning lines as rows, signal lines as columns, a matrix of pixels disposed at respective intersections of the scanning lines and the signal lines, and power supply lines disposed along respective rows of the pixels, the driver having a main scanner for successively supplying control signals to the scanning lines to perform line-sequential scanning on the rows of the pixels, a power supply scanner for supplying a power supply voltage, which selectively switches between a first potential and a second potential, to the power supply lines in synchronism with the line-sequential scanning, and a signal selector for supplying a signal potential, which serves as a video signal, and a reference potential to the signal lines as the columns in synchronism with the line-sequential scanning.
Owner:JOLED INC

Organic light emitting device pixel circuit and driving method therefor

A pixel circuit in an organic light emitting device capable of realizing high gradation representation by self-compensating a threshold voltage, and a method for driving the same. The pixel circuit includes an electroluminescent element for emitting light in response to an applied driving current. A first transistor delivers a data signal voltage in response to a current scan line signal. A second transistor generates a driving current to drive the electroluminescent element in response to the data signal voltage. A third transistor connects the second transistor in the form of a diode in response to a current scan signal to self-compensate the threshold voltage of the second transistor. A capacitor stores the data signal voltage delivered to the second transistor. A fourth transistor delivers a power supply voltage to the second transistor in response to a current light-emitting signal. A fifth transistor provides the driving current, provided from the second transistor, for the electroluminescent element in response to the current light-emitting signal.
Owner:SAMSUNG DISPLAY CO LTD

Organic light emitting diode display

An organic light emitting diode (OLED) display device for reducing the number of lines of an organic light emitting diode panel is provided. The OLED display device includes first and second data lines; a power voltage supply line supplied with a power supply voltage; a gate line crossing the first data line, the second data line and the power voltage supply line; first and second organic light emitting diodes commonly connected to the power voltage supply line; a first organic light emitting diode driving circuit for driving the first organic light emitting diode with a data voltage from the first data line in response to a scanning signal from the gate line; and a second organic light emitting diode driving circuit for driving the second organic light emitting diode with a data voltage from the second data line in response to the scanning signal from the gate line.
Owner:LG DISPLAY CO LTD

Semiconductor memory device with memory cells operated by boosted voltage

A memory using an SRAM memory cell intended for low-voltage operation is designed to decrease the threshold value of MOB transistors constituting the memory cell without substantial decrease in the static noise margin, which is the operational margin of the memory cell. To this end, a voltage Vdd' higher than a power supply voltage Vdd of a power supply line for peripheral circuits is supplied from a power supply line for memory cells as a power supply voltage for memory cells. Since the conductance of driver MOB transistors is in-creased, the threshold voltage of the MOB transistors within the memory cells can be reduced without reducing the static noise margin. Further the ratio of width between the driver MOS transistor and a transfer MOB transistor can be set to 1, thereby allowing a reduction in the memory cell area.
Owner:RENESAS ELECTRONICS CORP

Integrated circuit structure including three-dimensional memory array

An integrated circuit device includes a three-dimensional memory array and array terminal circuitry for providing to selected memory cells of the array a write voltage different from a read voltage. Neither voltage is necessarily equal to a VDD power supply voltage supplied to the integrated circuit. The write voltage, particularly if greater than VDD, may be generated by an on-chip voltage generator, such as a charge pump, which may require an undesirably large amount of die area, particularly relative to a higher bit density three-dimensional memory array formed entirely in layers above a semiconductor substrate. In several preferred embodiments, the area directly beneath a memory array is advantageously utilized to layout at least some of the write voltage generator, thus locating the generator near the selected memory cells during a write operation.
Owner:SANDISK TECH LLC

Method and circuit arrangement for the ageing compensation of an organic light-emitting diode and circuit arrangement

The invention relates to a method and a circuit arrangement for the ageing compensation of an organic light-emitting diode (OLED) which is fed from a supply voltage and is switched by means of a driver transistor operated in saturation operation, by means of a driving of the light-emitting diode. The method comprises the following steps of: storing at least one desired current-voltage value pair of a desired current-voltage characteristic curve of the light-emitting diode; transferring the driver transistor from saturation operation to linear operation during a measurement cycle; measuring a current value for the current through the light-emitting diode by means of a current measuring circuit in the measurement cycle; determining at least one present current-voltage value pair of a present current-voltage characteristic curve of the light-emitting diode by means of the measured current value; comparing the at least one present current-voltage value pair of the light-emitting diode with the desired current-voltage value pair of the light-emitting diode; and generating driving parameters for driving the light-emitting diode in a manner dependent on the result of the comparison.
Owner:NOVALED GMBH

Method and device for controlling indoor humidity

The invention discloses a method for controlling indoor humidity. The method comprises the following steps of: entering a working mode which comprises a humidifying mode and a dehumidifying mode; detecting indoor humidity RH1, comparing RH1 with set humidity RH2, determining the working mode as the dehumidifying mode if RH1 is greater than RH2, determining dehumidifying amount according to RH1 and RH2 if RH1 is smaller than RH2 and the working mode is the humidifying mode; determining power supply voltage U used for controlling a gap d of a dehumidifying film according to the dehumidifying amount; and supplying power to the dehumidifying film for regulating the gap to be d. Besides, the invention further provides a device for controlling indoor humidity. The method and the device can control the gap size of the dehumidifying film, power supply voltage and flow of a booster pump according to the indoor humidity; and integral coordination control is performed on indoor humidity according to a working condition required by a user.
Owner:WUHAN HAIER ELECTRONICS CO LTD

Charge pump circuit adjustable in response to an external voltage source

An integrated circuit detects the voltage level of the supply voltage to the integrated circuit. Circuity on the integrated circuit including the charge pump circuity adjusts to operate more effectively or efficiently at the voltage level of the supply voltage.
Owner:SANDISK TECH LLC

Semiconductor device

It is an object to provide a semiconductor device in which power consumption can be reduced. It is another object to provide a highly reliable semiconductor device using a programming cell, such as a programmable logic device (PLD). In accordance with a change in a configuration of connections between basic blocks, power supply voltage furnishing to the basic blocks is changed. That is, when the structure of connections between the basic blocks is such that a basic block does not contribute to a circuit, the supply of the power supply voltage to this basic block is stopped. Further, the supply of the power supply voltage to the basic blocks is controlled using a programming cell formed using a field effect transistor whose channel formation region is formed using an oxide semiconductor, the field effect transistor having extremely low off-state current or extremely low leakage current.
Owner:SEMICON ENERGY LAB CO LTD
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