The invention discloses a double-bit-line sub-threshold storage unit circuit which employs double-end read-write operation. The double-bit-line sub-threshold storage unit circuit comprises a first phase
inverter and a second phase
inverter, wherein the two phase inverters are connected to form a cross
coupling; and by employing a double-bit-
line structure of separating read bit lines from
write bit lines, two storage nodes of the cross
coupling are respectively connected to two
write bit lines through an N-channel
metal oxide semiconductor (NMOS) tube, and another two storage nodes of the cross
coupling are respectively connected to two read bit lines through the NMOS tube and a P-channel
metal oxide semiconductor (PMOS) tube. The double-bit-line sub-threshold storage unit circuit has the advantages that: by employing a PMOS substrate regulation technology, substrate ends of all PMOS tubes are connected to gate ends, so on the premise that additional management
power consumption is not improved and the performance is not reduced, the
energy consumption of dynamic operation and the
leakage power consumption of static operation of a
system can be reduced simultaneously, the
static noise margin of a storage unit is improved, and the performance of the
system is optimized.