153results about How to "More current" patented technology

A ballast circuit is disclosed for inductively providing power to a load. The ballast circuit includes an oscillator, a driver, a switching circuit, a resonant tank circuit and a current sensing circuit. The current sensing circuit provides a current feedback signal to the oscillator that is representative of the current in the resonant tank circuit. The current feedback signal drives the frequency of the ballast circuit causing the ballast circuit to seek resonance. The ballast circuit preferably includes a current limit circuit that is inductively coupled to the resonant tank circuit. The current limit circuit disables the ballast circuit when the current in the ballast circuit exceeds a predetermined threshold or falls outside a predetermined range.

A ballast circuit is disclosed for inductively providing power to a load. The ballast circuit includes an oscillator, a driver, a switching circuit, a resonant tank circuit and a current sensing circuit. The current sensing circuit provides a current feedback signal to the oscillator that is representative of the current in the resonant tank circuit. The current feedback signal drives the frequency of the ballast circuit causing the ballast circuit to seek resonance. The ballast circuit preferably includes a current limit circuit that is inductively coupled to the resonant tank circuit. The current limit circuit disables the ballast circuit when the current in the ballast circuit exceeds a predetermined threshold or falls outside a predetermined range.

A ballast circuit is disclosed for inductively providing power to a load. The ballast circuit includes an oscillator, a driver, a switching circuit, a resonant tank circuit and a current sensing circuit. The current sensing circuit provides a current feedback signal to the oscillator that is representative of the current in the resonant tank circuit. The current feedback signal drives the frequency of the ballast circuit causing the ballast circuit to seek resonance. The ballast circuit preferably includes a current limit circuit that is inductively coupled to the resonant tank circuit. The current limit circuit disables the ballast circuit when the current in the ballast circuit exceeds a predetermined threshold or falls outside a predetermined range.

A method and system for providing and using a magnetic memory is described. The method and system include providing a plurality of magnetic storage cells. Each magnetic storage cell includes a magnetic element and a selection device coupled with the magnetic element. The magnetic element is programmed by write currents driven through the magnetic element in a first or second direction. In one aspect, the method and system include providing a voltage supply and a voltage pump coupled with the magnetic storage cells and the voltage supply. The voltage supply provides a supply voltage. The voltage pump provides to the selection device a bias voltage having a magnitude greater than the supply voltage. Another aspect includes providing a silicon on oxide transistor as the selection device. Another aspect includes providing to the body of the transistor a body bias voltage that is a first voltage when the transistor is off and a second voltage when the transistor is on.

A disk drive is disclosed comprising an interface for receiving a primary supply voltage and a secondary supply voltage from a host computer. The primary supply voltage is applied to the windings of a multi-phase spindle motor in a commutation sequence, and the secondary supply voltage is connectable to a center tap of the windings.

A heat spreader for an LED can include a thermally conductive and optically transparent member. The bottom side of the heat spreader can be configured to attach to a light emitting side of the LED. The top and / or bottom surface of the heat spreader can have a phosphor layer formed thereon. The heat spreader can be configured to conduct heat from the LED to a package. The heat spreader can be configured to conduct heat from the phosphors to the package. By facilitating the removal of heat from the LED and phosphors, more current can be used to drive the LED. The use of more current facilitates the construction of a brighter LED, which can be used in applications such as flashlights, displays, and general illumination. By facilitating the removal of heat from the phosphors, desired colors can be better provided.

The battery system is provided with a battery 1 that can be recharged, a fuse 8 connected to the battery 1 that blows with excessive current flow, relays 2 connected to the output-side of the battery 1, and a current cut-off circuit 4 that detects excessive battery 1 current and controls the relays 2. The current cut-off circuit 4 detects excessive battery 1 current, and is provided with a timer section 24 that designates a time delay until the relays 2 are switched from ON to OFF. For the delay time of the timer section 24, the fusing current of the fuse 8 is set lower than the maximum cut-off current of the relays 2 and higher than the maximum allowable battery 1 charging and discharging current. In a situation where excessive current greater than the maximum cut-off current of the relays 2 flows through the battery 1, the fuse 8 is blown during the timer 24 delay time, and the current cut-off circuit 4 switches the relays 2 from ON to OFF when the delay time has elapsed.

The present invention provides circuitry for writing to and reading from an SRAM cell core, an SRAM cell, and an SRAM device. In one aspect, the circuitry includes a write circuit coupled to the SRAM cell core that includes a write transistor gated by a write word line. The circuitry also includes a read buffer circuit coupled to the SRAM cell core to read the cell without disturbing the state of the cell. The read buffer circuit includes a read transistor gated by a read word line, the read transistor coupled between a read bit-line and a read driver transistor that is further coupled to a voltage source Vss. The read driver transistor and a first driver transistor of the cell core are both gated by one output of the cell core. The read transistor has an electrical characteristic that differs from that of the core cell first driver transistor.

A conferencing method for providing reservation-less instant group conferencing. A subscriber dials in a conference code and a group code in his / her phone. The input signal is received in the switch serving the phone on sensing the conference code activates a trigger which results in communications with a conferencing system. The conference call is set up in a conferencing bridge and the phone of the subscriber is routed to the conferencing bridge. The conferencing system using group code obtains a group of phone numbers of participants from a database and calls each participant and connects each call participant to the conference call. Subscriber setting lists of participants and phone numbers in advance of the conference call with Internet access to the database.

An LED package having an MEMS switch operated by electrostatic force, capable of continuously protecting an LED from excessive current due to electrostatic discharge. The LED package includes a submount with first and second electrode patterns formed thereon; an LED mounted on the submount, having an n-electrode electrically connected to the first electrode pattern and a p-electrode electrically connected to the second electrode pattern; and an MEMS switch including a first conductive plate and a second conductive plate bent to have an area over and vertically apart from the first conductive plate, wherein the first and second conductive plates are electrically connected to the first and second electrode patterns, and the second conductive plate comes in contact with the first conductive plate by electrostatic force upon being applied with voltage higher than a predetermined level of voltage.

Methods and systems are disclosed that may be employed to improve efficiency of smart integrated power stages (IPstages) of multi-phase VR systems while operating under relatively light, ultra-light, or partial or reduced loads. The disclosed methods and systems may be implemented to improve VR system light load efficiency by providing and enabling reduced power IPstage operating modes in one or more smart IPstage / s of a VR system, and by enabling state transition between IPstage active and reduced power operating modes such as IPstage standby and IPstage hibernation modes.

The present invention provides circuitry for writing to and reading from an SRAM cell core, an SRAM cell, and an SRAM device. In one aspect, the circuitry includes a write circuit coupled to the SRAM cell core that includes a write transistor gated by a write word line. The circuitry also includes a read buffer circuit coupled to the SRAM cell core to read the cell without disturbing the state of the cell. The read buffer circuit includes a read transistor gated by a read word line, the read transistor coupled between a read bit-line and a read driver transistor that is further coupled to a voltage source Vss. The read driver transistor and a first driver transistor of the cell core are both gated by one output of the cell core. The read transistor has an electrical characteristic that differs from that of the core cell first driver transistor.

A rechargeable battery assembly comprises a built in connector, circuitry to provide charge control, at least one rechargeable battery unit, and circuitry providing a further function. The battery assembly is mechanically reversible between a deployed configuration having a general form and functions of a conventional battery format and a charge configuration in which the connector is made accessible. In the deployed configuration the battery assembly is capable of providing a discharge to at least one voltage level and can be charged by means of a suitable external charger device. In the charge configuration the battery assembly can be charged by means of the integral charge control circuitry when the connector is connected to a suitable powered receptacle on a computing or peripheral device.

An ionic liquid ion source can include a microfabricated body including a base and a tip. The microfabricated body can be formed of a porous metal compatible (e.g., does not react or result in electrochemical decaying or corrosion) with an ionic liquid or a room-temperature molten salt. The microfabricated body can have a pore size gradient that decreases from the base of the body to the tip of the body, so that the ionic liquid can be transported through capillarity from the base to the tip.

A controller (30) determines a failure of an inverter (14) in response to detection of an excessive current in any one of IGBT elements of the inverter (14) during driving of a motor generator (MG1). The controller (30) sets the inverter (14) to a suspended state in response to the determination of the failure, and identifies a short-circuited phase based on a motor current (MCRT1) from a current sensor (24). The controller (30) simultaneously turns on two IGBT elements forming upper and lower arms of the short-circuited phase in a discharge process of a capacitor (C2) performed during stop control of a vehicle. Thus, the two IGBT elements are short-circuited because of a rapid increase in heat loss caused by an excessive short-circuit current. As a result, an excessive current at the inverter and power supply lines caused by a back electromotive force generated at the motor generator (MG1) when the vehicle is towed is suppressed.

A method and system for providing and using a magnetic memory is described. The method and system include providing a plurality of magnetic storage cells. Each magnetic storage cell includes a magnetic element and a selection device coupled with the magnetic element. The magnetic element is programmed by write currents driven through the magnetic element in a first or second direction. In one aspect, the method and system include providing a voltage supply and a voltage pump coupled with the magnetic storage cells and the voltage supply. The voltage supply provides a supply voltage. The voltage pump provides to the selection device a bias voltage having a magnitude greater than the supply voltage. Another aspect includes providing a silicon on oxide transistor as the selection device. Another aspect includes providing to the body of the transistor a body bias voltage that is a first voltage when the transistor is off and a second voltage when the transistor is on.

An ESD protection device including a transistor structure with resistive regions located within active areas thereof. The transistor structure is formed of one or more MOS transistors, preferably N-type MOS transistors. The drain regions of the transistors are modified to reduce the conductivity of those resistive regions by preventing high carrier concentration implants in one or more sections of the drain regions. This is achieved by modifying an N LDD mask and the steps related thereto, as well as a silicide exclusion mask and the steps related thereto. The modifications result in the omission of N LDD dopant from the area immediately adjacent to the underlying channel. In addition, portions of a spacer oxide remain over the drain region to be formed. Subsequent implant and siliciding steps are effectively blocked by the spacer oxide that remains, leaving a low-density drain (LDD) charge carrier concentration in those regions, except where omitted. The resistivity of those resistive LDD regions is greater than the resistivity of the adjacent portions of the drain region. The result is more uniform turn-on of ESD transistor fingers in a protection device set without the need to add valuable layout space and without increased processing steps.

A driving integrated circuit (IC) is provided. The driving IC includes a reference voltage setup circuit configured to output a reference voltage based on a test voltage and a load current control unit comparing a load voltage output from a load resistor with the reference voltage in response to a load current and maintaining the load current constant based on a result of the comparison.

An uninterruptible power supply for home / office networking and communication system (UPS) comprising: (i) an AC-DC converter, (ii) a battery charger, (iii) a rechargeable battery array, (iv) a control circuit, and (v) a plurality of DC-DC voltage converters / voltage controllers, wherein, in operation, when an AC power supply is available, the UPS provides a plurality of DC voltage outputs to a plurality of loads Li, through the AC-DC converter, the control circuit, and the plurality of the DC-DC voltage converters / voltage controllers, and provides continuous DC charge to the rechargeable battery array, and when the AC power supply becomes unavailable, the control circuit detects the unavailability of the AC power supply, the UPS provides a plurality of DC voltage outputs to the plurality of loads Li, through an DC supply voltage of the rechargeable battery array, the control circuit, and the plurality of the DC-DC voltage converters / voltage controllers.

Embodiments of the present invention recite a level shifting circuit for high voltage protection. In embodiments of the present invention, the level shifting circuit comprises a first transistor, a second transistor, a third transistor, and a fourth transistor coupled in a cascode configuration. The circuit further comprises a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor coupled in a cascode configuration. The level shifting circuit further comprises an output coupled with the source of the first transistor, the gate of the seventh transistor, and with the drain of the second transistor. A first inverter is coupled with a second inverter in series and an input signal conveyed to the first inverter dynamically controls the bias level for said second and sixth transistors.

An excitation power converter of a doubly-fed generator is protected from excess current to be caused by ground fault or system disturbance and operation continuity of the power converter is ensured. In a power converter system, in order not to flow excess current generated in secondary windings of the doubly-fed generator into the power converter, a rectifier is connected in parallel to the power converter via a reactor, a DC link of the rectifier is connected to a DC link of the power converter, excess current flowing from the secondary windings is separately flowed at a reactor impedance ratio to reduce an amount of current flowing into the power converter, and a semiconductor switching element of an excess current generation arm of the power converter is set to an on-state.

Magnetic tunnel junctions (MTJs) and methods of forming same are disclosed. A pinned layer is disposed in the MTJ such that a free layer of the MTJ can couple to a drain of an access transistor when provided in a magnetic random access memory (MRAM) bitcell. This structure alters the write current flow direction to align the write current characteristics of the MTJ with write current supply capability of an MRAM bitcell employing the MTJ. As a result, more write current can be provided to switch the MTJ from a parallel (P) to anti-parallel (AP) state. An anti-ferromagnetic material (AFM) layer is provided on the pinned layer to fix pinned layer magnetization. To provide enough area for depositing the AFM layer to secure pinned layer magnetization, a pinned layer having a pinned layer surface area greater than a free layer surface area of the free layer is provided.

A ballast circuit is disclosed for inductively providing power to a load. The ballast circuit includes an oscillator, a driver, a switching circuit, a resonant tank circuit and a current sensing circuit. The current sensing circuit provides a current feedback signal to the oscillator that is representative of the current in the resonant tank circuit. The current feedback signal drives the frequency of the ballast circuit causing the ballast circuit to seek resonance. The ballast circuit preferably includes a current limit circuit that is inductively coupled to the resonant tank circuit. The current limit circuit disables the ballast circuit when the current in the ballast circuit exceeds a predetermined threshold or falls outside a predetermined range.

A vehicle power supply device comprises a first battery connectable to a starter motor, a vehicle load, and a generator, a second battery different from the first battery in electric characteristics, a connecting switch connected between the first and second batteries, and connecting the first and second batteries in parallel in an ON state of the connecting switch, and a control circuit controlling the connecting switch. In the ON state of the connecting switch, the generator charges the first and second batteries. The control circuit controls to change to the OFF state of the connecting switch in a state of providing electric power to the starter motor, or in a state of detecting an open condition including an abnormal state of the first battery and / or the second battery, and to hold the connecting switch in the ON state in a normal state in which the open condition is not detected.

The present invention provides improved angular aperture schemes for generating shaped beam spots having a desired geometric shape from rectangular, elliptical, and semi-elliptical apertures having one sharp edge. A sharper beam edge can be generated by offsetting the rectangular or elliptical aperture in combination with under or over focus. In the spherical aberration limit, under-focused semi-circle apertures provide a sharp, flat edge. The sharp edge can be made resolute enough for precision milling applications, and at the same time, the spot can be made large enough with enough overall current and current density to efficiently mill away material in either a production or laboratory environment. Depending on the particular beam spot that is desired, combinations of techniques including defocusing, aperture offsetting, and stigmation adjustment, can be used in both spherical aberration dominant and chromatic aberration dominant environments to achieve a desired beam for a desired application.

A semiconductor device includes a field effect transistor and a pn junction diode formed on a substrate. The field effect transistor has a source electrode, a drain electrode and a gate electrode formed on an element forming layer including a plurality of nitride semiconductor layers. The diode includes a p-type nitride semiconductor layer selectively formed on the element forming layer and an ohmic electrode, and has a pn junction formed between an n-type region of a two-dimensional electron gas generated on a heterojunction interface and a p-type region of the p-type nitride semiconductor layer. The diode is electrically connected to the gate electrode and forms a current path for allowing an excessive current caused in the gate electrode to pass.

An inventive switching type dc-dc converter is adapted to set a protective reference current level lower for a decreased output voltage, and stop the switching control signal supplied to a switching transistor circuit when the detected current level exceeds the protective reference current level. In addition, in case where the output voltage declines due to, for example, a circuit failure such as short-circuiting, the switching period of the switching transistor circuit is extended. Thus, the switching type dc-dc converter is provided with a fold-back current limiting type protection characteristic through reduction of the protective reference current level and extension of the switching period of cycle.

A cleaning device is provided with a conductive fur brush kept in contact with a transfer belt, a conductive brush kept in contact with the transfer belt upstream of the fur brush in the feed direction, and a single of constant-current d.c. power supply. The fur brush is connected to the constant-current d.c. power supply, and the conductive brush is grounded. A current flows from the constant-current d.c. power supply via the transfer belt to the conductive brush.