38results about How to "Increase etch depth" patented technology

The invention discloses a method for preparing a hundred nano grade narrow line width holographic grating photoresist pattern with various features, which comprises the following steps of: 1. diluting photoresist according to different proportions and throwing the photoresist on a clean substrate to obtain photoresist layers with the respective thicknesses of 80nm, 120nm, 160nm, 200nm and 260nm; 2. carrying out the exposure of corresponding dosage on the photoresist layers with different thicknesses by a holographic exposure system with the thickness of 325nm; 3. carrying out development and photographic fixation on a sample after exposure processing to obtain a corresponding photoresist grating feature pattern; 4. after-baking the sample, removing a primer by a plasma resist removing machine and decorating the obtained photoresist grating feature. By utilizing the invention, the hundred nano grade narrow line width holographic grating photoresist pattern with various features is prepared.

A quantum cascade laser includes a substrate having a principal surface including first and second regions arranged along a first axis; a laser structure disposed on the principal surface in the second region, the laser structure having an end facet intersecting the first axis, the laser structure including a stripe-shaped stacked semiconductor layer extending along the first axis; and a distributed Bragg reflection structure disposed on the principal surface in the first region, the distributed Bragg reflection structure including a semiconductor wall made of a single semiconductor material, the distributed Bragg reflection structure being optically coupled to the end facet of the laser structure. The semiconductor wall has first and second side surfaces that intersect the first axis and extend along a second axis intersecting the principal surface. The semiconductor wall is located away from the end facet of the laser structure.

The invention discloses a transistor and a formation method thereof. The formation method of the transistor comprises: providing a semiconductor substrate, wherein the surface of the semiconductor substrate is provided with a threshold voltage adjusting film, the surface of the threshold voltage adjusting film is provided with a barrier film, the surface of the barrier film is provided with a channel film, the threshold voltage adjusting film is internally provided with doped irons, the channel film is at an intrinsic state, and the barrier film is used for preventing penetration by the doped irons in the threshold voltage adjusting film; forming a grid structure on the surface of the channel film; forming a first side wall on the surface of the channel film at the two sides of the grid structure; by taking the grid structure and the first side wall as masks, etching the channel film, the barrier film, the threshold voltage adjusting film and a part of the semiconductor substrate to form a channel layer, a barrier layer and a threshold voltage adjusting layer; and forming a doping layer on the surface of the semiconductor substrate at the two sides of the threshold voltage adjusting layer, the barrier layer, the channel layer and the grid structure, wherein the surface of the doping layer is not lower than the surface of the channel layer. The performance of the formed transistor is improved.

The present invention discloses a memory and a manufacturing method thereof. A memory element comprises a first insulating layer, a second insulating layer, an isolation layer, a floating gate electrode, a control gate electrode, a channel layer and a tunneling oxide layer. The second insulating layer is adjacent to and parallel with the first insulating layer and defines an interlayer space with the first insulating layer, the isolation layer is located in the interlayer space, and the included angle of the isolation layer and the first insulating layer is a non-flat angle. The interlayer space is isolated into a first concave chamber and a second concave chamber, the floating gate electrode is located in the first concave chamber, and the control gate electrode is located in the second concave chamber. The channel layer is located at the outer side of the opening of the first concave chamber, the included angle of the channel layer and the first insulating layer is a non-flat angle, and the tunneling oxide layer is located between the channel layer and the floating gate electrode.

The present invention is to provide a method for making a shadow mask for an opposed discharge plasma display panel by etching one lateral surface of a metal slab to produce a plurality of parallel and equidistant barrier ribs along the vertical and horizontal directions on the lateral surface and a discharging cell by enclosing every four adjacent barrier ribs. A shadow hole is formed at the middle of each discharging cell and etched through the metal slab, and at least one groove interconnected to the shadow holes is produced on another lateral surface of the metal slab by utilizing a rolling process or a stamping process. The adjacent grooves are interconnected with each other, and a plurality of air guide channels is formed on another lateral side, such that a shadow mask can be made in a simple and fast manner, chemical pollutions caused by a traditional double-sided etching can be minimized, and the product yield rate and the manufacturing cost can be effectively improved and lowered.

The invention provides a MEMS deep silicon etching method, which belongs to the technical field of deep silicon etching. The technical solution is: a MEMS deep silicon etching method, including deposition steps, cleaning steps, etching steps, purging steps, repeated deposition steps, repeated cleaning steps, repeated etching steps and repeated purging steps, after several The deposition step, cleaning step, etch step and purge step are side-circulated, and the sample is out of vacuum. The beneficial effects of the present invention are: the deep silicon etching method of the present invention can be applied in the industrial manufacturing environment of large-scale integrated circuits, in particular, it can enable the sensor element to maintain the integrity of the device during long-term etching, and It can meet the needs of device design, adding a purge step can reduce the temperature of the vacuum reaction chamber and the sample stage, so that the vacuum reaction chamber can be kept in a constant range, which helps to provide the uniformity of large-scale samples after etching and the roughness of the sidewall of the MEMS device.

The invention discloses a method for preparing a holographic grating photoresist pattern with a narrow line width of 100 nanometers and various shapes. Drop glue on the bottom to obtain photoresist layers with thicknesses of 70nm, 110nm, 160nm, 240nm and 290nm respectively; Step 2: Use a 325nm holographic exposure system to expose the photoresist layers of different thicknesses with corresponding doses; Step 3 : develop and fix the exposed sample to obtain the corresponding photoresist grating topography pattern; step 4: post-bake the sample, remove the primer with a plasma degumming machine, and analyze the obtained photoresist grating The shape is modified. By using the invention, the holographic grating photoresist pattern with various shapes and narrow line widths in the order of 100 nanometers is prepared.

The invention discloses a method and a device for etching and processing aluminum oxide ceramics. The method includes positioning the integral clean aluminum oxide ceramics in water; scanning, etching and processing the aluminum oxide ceramics by the aid of ultraviolet pulse laser. The distances from the surface of the water to the surfaces of aluminum oxide ceramic materials range from 2mm to 12mm. The surfaces of the etched and processed aluminum oxide ceramics are free of blackened deterioration layers and re-coagulation layers. The device comprises an ultraviolet laser device, a scanning galvanometer, a two-dimensional processing platform and a container. The container is used for accommodating the water and the to-be-processed aluminum oxide ceramics. The method and the device have the advantages that a 'water' factor is ingeniously introduced into the method and the device, cooling and slagging effects can be realized when the aluminum oxide ceramics are etched by the aid of the laser under the condition of a certain thickness or in the water with a certain flow rate, accordingly, blackening deterioration due to direct etching in the air can be effectively prevented, the etching depth can be increased, the etching quality and the laser etching and processing efficiency can be improved, and various three-dimensional complicated patterns with high dimensional precision can be etched and manufactured on the surfaces of the aluminum oxide ceramics by the aid of the method and the device.

The invention provides an etching method, comprising: firstly, providing a layer to be etched; then, forming a patterned photoresist layer on the layer to be etched; The photoresist on the top and sidewalls in the glue layer is subjected to an ion implantation process to form a photoresist shell, and the tilt angle θ of the ion implantation in the ion implantation process is calculated using the shadow effect; finally, to form the The patterned photoresist layer of the photoresist shell is used as a mask to etch the layer to be etched. The present invention forms a photoresist shell by performing an ion implantation process on the top and sidewall photoresist in the patterned photoresist layer, which can reduce the attenuation of the patterned photoresist layer during the etching process, and Increase thickness selectivity of photoresist.

A femtosecond pulse compression device comprises a first grating and a second grating which are arranged in parallel, and the surfaces of the two gratings, which are provided with grating fringes, arearranged on the inner side of the gratings, the first grating and the second grating with the same structure are all sub-wavelength deep etching transmission gratings whose periodic times are d, thesecond grating is arranged on the second direction of the diffraction order of the transmission negative first order of the first grating, femtosecond laser pulse which needs to be compressed is incident to the first grating in a Bragg angle theta and meet the grating equation, sin theta= lambda0 / 2d, wherein theta is an incident angle, lambda0 is a center wavelength of the femtosecond laser pulse.The invention utilizes the sub-wavelength deep etching transmission gratings to constitute the femtosecond pulse compression device which has the advantages of compact structure and high efficiency.

The invention discloses a semiconductor device, comprising: a plurality of fins extending along a first direction on a substrate, extending along a second direction and crossing the gate of each fin, The source-drain region and the side wall of the gate, wherein the fin is composed of a buffer layer and a channel layer made of high-mobility material, and the buffer layer surrounds the side surface and the bottom surface of the channel layer. According to the semiconductor device and its manufacturing method of the present invention, by removing the dummy gate stack while increasing the etching depth and lateral width, a high carrier mobility can be locally aligned on the desired fin structure channel, thereby effectively improving the carrier mobility in the channel region of the fin, thereby effectively improving device performance and reliability.

The invention provides a technological method for a glass substrate. The method includes: a photoresist deposition step: depositing negative photoresist on a glass substrate surface; a photoresist exposure step: exposing and developing negative photoresist to form a mask pattern; a mask deposition step: depositing an isolation layer and a metal layer on the negative photoresist surface and the glass substrate surface not covered by the negative photoresist in order, wherein the isolation layer is prepared from an anti-anodic oxidation material, and the metal layer is prepared from a bivalent or trivalent metal material; a photoresist removal step: removing the negative photoresist and the isolation layer and the metal layer thereon; and a mask oxidation step: carrying out anodic oxidation on the metal layer to form the metal oxide layer. The technological method for the glass substrate provided by the invention can improve the etching selection ratio of the glass substrate to the mask.