341results about How to "Reduce operating voltage" patented technology

An avalanche photo-detector (APD) is disclosed, which can reduce device capacitance, operating voltage, carrier transport time and dark current as well as increasing response speed and output power. Thus, an avalanche photo-detector (APD) with high saturation power, high gain-bandwidth product, low noise, fast response, low dark current is achieved. The APD includes an absorption layer with graded doping for converting an incident light into carriers, an undoped multiplication layer for multiplying current by means of receiving carriers, a doped field buffer layer sandwiched between the absorption layer and the multiplication layer for concentrating an electric field in the multiplication layer when a bias voltage is applied, and an undoped drift layer sandwiched between the absorption layer and the field buffer layer for capacitance reduction.

A tandem organic light emitting diode (OLED) device comprised of multiple stacked single OLEDs electrically connected in parallel via transparent interlayer is recited herein. Transparent interlayers are coated by charge injection layers in order to enhance the charge injection efficiency and decrease the operation voltage. Transparent nanomaterials, such as carbon nanotube sheets (or graphene, graphene ribbons and similar conductive transparent nano-carbon forms) are used as Interlayers or outer electrodes. Furthermore, functionalization of carbon nanotubes inter layers by n-doping (or p-doping) converts them into common cathode (or common anode), further decreasing operation voltage of tandem. The development of these alternative interconnecting layers comprised of nanomaterials simplifies the process and may be combined with traditional OLED devices. In addition, novel architectures are enabled that allow the parallel connection of the stacked OLEDs into monolithic multi-junction OLED tandems.

A blue phase liquid crystal composition and a LC display using the composition. The liquid crystal composition includes a first class including a highly polar compound and a second class including a highly conjugated liquid crystal compound. The blue phase liquid crystal display device includes first and second substrates each with polarizer on the exterior surface and the blue phase liquid crystal composition sandwiched therebetween with and patterned electrodes on one of the substrates or both substrates. The patterned electrodes can be T-shaped, chevron or v-shaped, thin comb like shape and can also be flat or trapezoidal. The device outputs different light transmissions from the electrically controllable induced birefringence of the blue phase LC material for a low driving voltage, high transmittance blue phase liquid crystal display device.

Provided are novel compounds for organic electronic material, and organic electronic devices comprising the same. Specifically, the compounds for organic electronic material according to the invention are characterized in that they are represented by Chemical Formula (I) or Formula (II): wherein, R1, R2 and R3 cannot be hydrogen all at the same time; excluding the case wherein R1-L1-?, R2-L2 -?or R3-L3-?independently represents diphenylamino group(?-NPh2 ).

Provided is a method of reliably reducing power consumption of a computer, while promoting prompt compilation of a source code and execution of an output code. The method according to this invention includes the steps of: reading a code which is preset and analyzing an amount of operation of the CPU and an access amount with respect to the cache memory based on the code; obtaining an execution rate of the CPU and an access rate with respect to the cache memory based on the amount of operation and the access amount; determining an area in which the access rate with respect to the cache memory is higher than the execution rate of the CPU, based on the code; adding a code for enabling the power consumption reduction function to the area; and generating an execution code executable on the computer, based on the code.

A process for producing a nitride semiconductor according to the present invention includes: step (A) of provided an n-GaN substrate 101; step (B) of forming on the substrate 101 a plurality of stripe ridges having upper faces which are parallel to a principal face of the substrate 101; step (C) of selectively growing AlxGayInzN crystals (0≦x, y, z≦1: x+y+z=1) 104 on the upper faces of the plurality of stripe ridges, the AlxGayInzN crystals containing an n-type impurity at a first concentration; and step (D) of growing an Alx<sup2>′< / sup2>Gay<sup2>′< / sup2>Inz<sup2>′< / sup2>N crystal (0≦x′, y′, z′≦1: x′+y′+z′=1) 106 on the AlxGayInzN crystals 104, the Alx<sup2>′< / sup2>Gay<sup2>′< / sup2>Inz<sup2>′< / sup2>N crystal 106 containing an n-type impurity at a second concentration which is lower than the first concentration, and linking every two adjoining AlxGayInzN crystals 104 with the Alx<sup2>′< / sup2>Gay<sup2>′< / sup2>Inz<sup2>′< / sup2>N crystal 106 to form one nitride semiconductor layer 120.

The invention provides an OLED (organic light emitting diode) device and a display device. The OLED device comprises a first electrode, a second electrode and an organic functional layer positioned between the first electrode and the second electrode. The organic functional layer at least comprises a first partial functional layer formed by a first production process and a second partial functional layer formed by a second production process. A mixed transition layer is arranged between the first partial functional layer and the second partial functional layer, and is made of a first main material and a second main material at least. The hole mobility of the first main material is higher than the electronic mobility thereof. The electronic mobility of the second main material is higher than the hole mobility thereof. By the OLED device, the problem of unbalanced carrier transmission of the mixed transition layer can be solved, so that service life of the OLED device is prolonged, operation voltage is reduced and efficiency is improved.

The invention discloses a pair of Pancharatnam-Berry (PB) phase liquid crystal lens-based smart glasses, comprising a pair of glasses, PB phase liquid crystal lenses, a battery and a circuit driving device, wherein the PB phase liquid crystal lenses are embedded into lenses of the glasses or fit closely onto the lenses of the glasses; the circuit driving device and the battery are arranged in series on a handle of the glasses, and are connected in series with the PB phase liquid crystal lenses; and the display pixels of the smart glasses are formed by a single or more PB phase liquid crystal lenses, and an array of the pixels is driven directly by electricity or driven by a passive matrix or driven by an active matrix. According to the smart glasses disclosed by the invention, by virtue of manufacture and use of a liquid crystal PB phase lens array, on one hand, an artificial backlight source is not needed to realize a transparent display effect of switching between a blurred state and a clear state, the energy consumption is reduced, and a relatively strong endurance is achieved; and on the other hand, the operating voltage is relatively low, generally lower than 5V, so that the safety performance of head-mounted augmented reality is improved.

The invention relates to a high-dielectric-constant gate dielectric composite channel field effect transistor device and belongs to the technical field of micro-electronics new materials and devices. The device comprises a substrate, a high-dielectric-constant gate dielectric, a graphical graphene conducting channel and a graphical molybdenum sulfide (MoS2) conducting channel which are sequentially stacked, and comprises a metal source electrode and a metal drain electrode which are arranged on the composite conducting channel. According to a preparing method, the mode of the atomic layer deposition technology (ALD) is directly utilized, and a high-dielectric-constant (high-k) material grows on the Si substrate. As the graphene / molybdenum sulfide (MoS2) composite channels are adopted, the larger migration rate and the larger switch ratio can be obtained, and the electric property of the device is improved.

A light-emitting element including a light-emitting thyristor and a schottky barrier diode is provided. A schottky barrier diode is formed by contacting a metal terminal to a gate layer of a three-terminal light-emitting thyristor consisting of a PNPN-structure. A self-scanning light-emitting element array may be driven at 3.0 V by using such a schottky barrier diode as a coupling diode of a diode-coupled self-scanning light-emitting element array.

This invention relates to a BFO / BXT laminated capacitor and its preparing method, in which, the capacitor includes: a substrate made of silicon and orderly combined with an oxidation layer, a lower electrode metal layer, a BFO film and an upper metal layer, in which, a BXT induction film is set between the lower electrode metal layer and the BFO film. The method includes: preparation of sol of RFO and BXT precursors and preparation of the capacitor of its laminated structure and the ferroelectric capacitor prepared with this method includes excellent property of anti-fatigue, high residual polarized intensity, low operational voltage and better dielectric property.

A low-voltage thin-film field-effect transistor is formed by forming a gate, forming a dielectric layer on the surface of the gate, forming a source region and a drain region, and forming a semiconductor layer adjacent the dielectric layer. The dielectric layer is formed as a native oxide layer by oxidizing the surface of the gate. The semiconductor layer is deposited by spray pyrolysis. The dielectric layer may be functionalized with a self-assembling monolayer dielectric layer. The dielectric layer may be formed as a self-assembling monolayer, without first forming a native oxide (or other) dielectric layer.

The invention pertains to the technical field of semiconductor memories, and specifically relates to a U-shaped trench type semiconductor device which comprises at least one semiconductor substrate, a source region, a drain region, a floating gate, a control gate, a U-shaped trench region and a gate-control p-n junction diode for connecting the floating gate and the drain region. The U-shaped trench type semiconductor device provided in the invention uses the floating gate to store information, and perform charging and discharging on the floating gate through the gate-control p-n junction diode, so advantages of small unit area, high chip density, low operating voltage during data storage and good data rentation capability can be realized.

The invention relates to a resistance transition type memory and a manufacturing method thereof, belonging to the technical field of information storage. The memory comprises an upper electrode, a lower electrode and a resistance transition storage layer positioned between the upper electrode and the lower electrode, wherein, the upper electrode and the lower electrode are both made of materials with work function of 4.5-6 electron volts, and the resistance transition storage layer is a thin film made of P-type semiconductor binary metal oxides. The resistance transition type memory of the invention has simple structure, employs the materials with high work function to manufacture the upper electrode and the lower electrode, and uses the thin film made of the P-type semiconductor binary metal oxides as the resistance transition storage layer so that interfaces of the upper electrode, the lower electrode resistance transition storage layer can form ohmic contact or low Schottky contact and a memory device can realize the transition between high resistance state and low resistance state under low operating voltage, thus reducing the operating voltage of the memory device.

The invention discloses a control device and method of a bistable permanent-magnet vacuum circuit breaker rapid divide-shut brake. The method comprises the following steps that a freewheeling diode is utilized for enabling the coils to be supplied with follow current, so that the coils can discharge to a corresponding discharge capacitor when switch tubes on the two sides of an opening coil or a closing coil are all turned off, and at the same time, the induced voltage generated by mutual inductance is counteracted with the negative voltage, namely, the voltage of a non-discharge voltage. According to the control device and method, the problem of the conventional bistable operating mechanism that the voltage drop of the capacitor is too big and the operation is influenced by the induced current is solved, the control voltage is reduced, the discharging peak current is reduced, the movement speed can be adjusted by the PWM drive control module according to requirements and the contact bounce is reduced, so that the operating characteristic is more in accordance with the arc resistance of the circuit breaker.

In the invention, an organic electroluminescent element comprises a cathode, an anode, a light-emitting layer, a hole source and an electronic source. The light-emitting layer is disposed between the anode and cathode, and the hole source is disposed between the anode and the light-emitting layer. The electronic source disposed between the cathode and the light-emitting layer is made of at least one kind of organic material and at least one kind of salt. The salt has the concentration capable of changing with the space distribution in the electronic source, so that the concentration of the salt at the electronic near the cathode is higher than that at the electronic source near the light-emitting layer.

An organic light emitting display device is provided. The organic light emitting display device includes at least one light emitting part between an anode and a cathode and having at least one light emitting part between an anode and a cathode and having at least one organic layer and a light emitting layer. The at least one organic layer includes a compound having a core with one or more nitrogen atoms and at least one other core with relatively high electronegativity.

Provided is a multifunctional exposure imaging method based on a composite dielectric grating metal-oxide-semiconductor field-effect transistor (MOSFET) light-sensitive detector. The exposure imaging method includes the steps that negative bias pulse Vb is added to a substrate, a forward voltage pulse Vp is added to one end of a source electrode or a drain electrode, the other end of the source electrode or the other end of the drain electrode is floated, or the source electrode and the drain electrode are respectively provided with one forward voltage pulse Vp, the source electrode and the drain electrode are additionally provided with a bias pulse larger than bias voltage of the substrate, meanwhile zero bias voltage or a forward bias pulse Vg is added to a control grid, and the substrate and a source and drain region generate a depletion layer. The number range of the Vg is 0-20V, the number range of the Vb is -20-0V, and the number range of the Vp is 0-10V. By means of adjustment of voltage, the detector can collect photoelectrons so that exposure imaging of the device is carried out. The multifunctional exposure imaging method has the advantages of having low-voltage operation, being free of dark current interference and accurate in imaging, detecting in low light, and being fast in imaging speed and the like.

The invention provides a memristor and a manufacturing method thereof. The memristor comprises a top electrode and a bottom electrode; and a single crystal CeO2 storage medium layer. The manufacturing method comprises steps: (1) a substrate is cleaned; (2) etching technology is used for directly forming the bottom electrode on the substrate; (3) epitaxy technology is used for enabling a single crystal CeO2 thin film to be epitaxial on the bottom electrode to serve as resistance random function layer material; and (4) the top electrode is formed on the single crystal CeO2 thin film. The memristor of the invention is high in durability, low in operation voltage, good in data retention capability and free of activation. The memristor is simple in manufacturing method, low in cost and compatible with the traditional CMOS technology.

The invention features a stacking structure on a baseboard of N type contact layer made of GaN material. It includes: a barrier layer stacked on the N type contact layer, in which an Alj-x GaxInyN layer, a SiN layer and another Alj-x GaxInyN layer are stacked in turn; a luminous layer that is an Alj-x GaxInyN layer formed on the barrier layer; another barrier layer; a SiN layer; an Alj-x GaxInyN layer; a P type contact layer located on top layer of barrier layer and made of Mg-doped P type GaN material; and a ohmic contact P type electrode layer is formed on its top; an ohmic contact N type electrode layer is formed at one side of N type contact layer above.

The invention belongs to the field of organic photoelectricity, and particularly relates to an organic compound and an organic photoelectric element containing the organic compound, in particular to an organic light-emitting diode. The structure of the organic compounds is shown in the formula (I). The organic compound group shown in the formula (I) has a remarkable characteristic that the difference value between the singlet state energy level S1 and the triplet state energy level T1 of the organic compounds is smaller than or equal to 0.35 electron volt. Detailed description information and the organic photoelectric element thereof can be understood by referring to the specific description provided by the invention. The organic compound provided by the invention has the characteristic of thermal activation delayed fluorescence, can improve the utilization efficiency of triplet excitons when being applied to an organic electroluminescent diode, and particularly can improve the current efficiency, reduce the driving voltage and obviously prolong the service life of a light-emitting element when being used as a functional layer of the light-emitting element, and good commercialization prospects are realized.

The invention discloses a nonvolatile multitime programmable memory, the memory includes a first storage unit, a second storage unit, a differential latch amplifier, a first read operation control switch and a second read operation control switch, wherein the first storage unit and the second storage unit are in differential connection, the output terminal of the first storage unit and the output terminal of the second storage unit are respectively connected with one input end of the differential latch amplifier, one end of the first read operation control switch and one end of the second read operation control switch are respectively connected with one output end of the differential latch amplifier, the other end of the first read operation control switch and the other end of the second read operation control switch are respectively connected with the ground; the first storage unit and the second storage unit respectively include a memory transistor, each memory transistor is a single-layer polysilicon floating gate transistor, and programming operation or erase operation of the first storage unit and the second storage unit are performed by injection of electrons into a floating gate or pulling of electrons out of the floating gate.

The invention belongs to the technical field of semiconductor memories, and particularly relates to a semiconductor device which comprises at least one semiconductor substrate, a source region, a drain region, a floating gate, a control gate and a grid-control p-n junction diode used for connecting the floating gate and the substrate. The semiconductor device is used for storing information of the floating gate and charging and discharging the floating gate through the grid-control p-n junction diode, and has the advantages that coupling efficiency of the control gate is high, and operation voltage in storage of data is low. By means of the semiconductor device, quick storage and compatible manufacturing of logic devices and flash memory devices can be achieved.

The invention relates to a gate stack structure suitable for a semiconductor flash memory device and a manufacturing method of the gate stack structure. In the gate stack structure, a P-type monocrystalline silicon wafer with crystallographic orientation of 100 is used as a substrate; and an Al2O3 film used as a charge tunneling layer, ruthenium-based RuOx nano-crystals used as a first charge trapping layer, a high dielectric constant HfxAlyOz film used as a second charge trapping layer, an Al2O3 film used as a charge barrier layer and an upper electrode layer are arranged on the substrate from bottom to top sequentially. In the invention, the ruthenium-based RuOx nano-crystals have high thermal stability and are difficult to diffuse at high temperature; the high dielectric constant HfxAlyOz film has higher charge trap density; and an upper electrode is made of metal palladium and has a higher work function. Therefore, the gate stack structure disclosed by the invention has wide application prospect in a nano-crystal memory capacitor.

According to an embodiment, a phase-change memory device comprises: an upper electrode and a lower electrode; a phase-change layer in which a crystal state thereof is changed by heat supplied by the upper electrode and the lower electrode; and a selector which selectively switches the heat supplied by the upper electrode and the lower electrode to the phase-change layer, wherein the selector is formed of a compound which includes a transition metal in the phase-change material so as to have a high resistance when the crystalline state of the selector is crystalline and so as to have a low resistance when the crystalline state of the selector is non-crystalline.