73results about How to "Etching precision" patented technology

The dielectric recording medium is provided with a dielectric material, a conductive thin film, and a substrate. The conductive thin film and the substrate are bonded by a resin adhesive. The dielectric material is constructed of a ferroelectric single crystal having a uniform thickness, and its one surface is used for a recording and / or reproducing surface, on the order of mm on a side and about 5000 Å thick. The conductive thin film, about 1000 to 2000 Å thick, is placed on a surrounding portion and a back surface of the recording and / or reproducing surface of the dielectric material. The substrate is intended to preserve the thin dielectric material and maintain the planarity, and concave portions are formed on the adhesive surface. The concave portions absorb excessive resin adhesive when the dielectric material is bonded onto the substrate, which makes the adhesive surface uniform and flat.

The dielectric recording medium is provided with a dielectric material, a conductive thin film, and a substrate. The conductive thin film and the substrate are bonded by a resin adhesive. The dielectric material is constructed of a ferroelectric single crystal having a uniform thickness, and its one surface is used for a recording and / or reproducing surface, on the order of mm on a side and about 5000 Å thick. The conductive thin film, about 1000 to 2000 Å thick, is placed on a surrounding portion and a back surface of the recording and / or reproducing surface of the dielectric material. The substrate is intended to preserve the thin dielectric material and maintain the planarity, and concave portions are formed on the adhesive surface. The concave portions absorb excessive resin adhesive when the dielectric material is bonded onto the substrate, which makes the adhesive surface uniform and flat.

A multiple piecepart alignment and attachment configuration for mating a fiber array (or even a single fiber) with a silicon photonic subassembly utilizes ever-tightening alignment tolerances to align the fiber array with a similar array of waveguides (or other devices) formed within the photonic subassembly. A box-shaped fiber holder is formed to include a plurality of grooves within its bottom interior surface to initially support the fiber array. A separate piecepart in the form of a lid is mated to, and aligned with, the silicon photonic subassembly. The lid is formed to include registration features on its underside that fit into alignment detents formed in the top surface of the silicon photonic subassembly upon attachment. The lid also includes a number of grooves formed on its underside that will capture the top surface of the fibers as the fiber holder is slide into place over the lid. The grooves within the lid function to tighten the pitch of the fiber array and ultimately control the lateral and vertical alignment between the fiber array and the subassembly. The subassembly is also formed to include etched channels along the endface (the channels aligned with optical waveguides / devices in the substrate) to mate with the fiber holder, where the optical fibers are ultimately positioned within the channels so as to be in alignment with the optical waveguides / devices.

An in situ dual-stage etch endpoint detection system is disclosed. The system includes an etch chamber, an interferometry endpoint monitoring system, and a non-IEP endpoint monitoring system. The etch chamber includes an electrostatic chuck (ESC), a top electrode, and a bottom electrode. The ESC is designed to support a wafer having a spacer layer formed over a gate structure. The interferometry endpoint (IEP) monitoring system is designed to monitor an interference photon beam reflected by the top of spacer layer and the reflection beam on interface of bottom of spacer during a first etch operation. The non-IEP endpoint monitoring system monitors a second etch operation by monitoring an etch time. A first etch operation implementing the IEP monitoring system is discontinued, leaving a thin spacer layer to be etched during the second etch operation.

A composite material for use in making printed wiring boards comprising a carrier having releasable conductive fine particles on its surface. The composite is laminated to a substrate with the conductive fine particles facing the substrate and the carrier removed, leaving the surface of the conductive fine particles exposed. Printed wiring is formed using the conductive fine particles as its base, thus providing improved peel strength and permitting formation of fine wiring lines and spaces.

The invention relates to a method for efficiently producing a high-precision multistep microlens array. The method includes that the step array to be produced is divided into multiple groups including a first group and a second group, the first group and the second group are connected end to end, and steps of each group are continuous in depth; the steps of the first group and the second group are synchronously produced to form two groups of steps identical in corresponding depth; the steps in the second group are integrally etched by certain depth and form the step array continuous in depth with the steps in the first group. By the method, the steps in different groups are created synchronously, so that producing efficiency is greatly improved, and cost is saved.

An etching liquid for preparing the insulating film of flexible PCB is prepared from the solution of potassium (or sodium or lithium) hydroxide (5-40%), C2-C6 unitary (or binary or ternery) alcohol or C2-C6 alcoholamine (or dialcoholamine) (10-70%), potassium (or sodium or lithium) carbonate (0-1.5%) and water (25-60%). Its chemical etching process is also disclosed.

The invention discloses a metalized ceramic substrate, a substrate manufacturing method and a substrate and chip welding method, belongs to the field of a semiconductor device, and specify to the problem of failure of a power electronic device caused by a cracking phenomenon between a chip and a metalized layer, and falling off or cracking of the chip due to frequent impact of cold and hot changesof environment temperature on the metalized ceramic substrate in the prior art. The invention provides the metalized ceramic substrate, the substrate manufacturing method and the substrate and chip welding method; the metalized ceramic substrate comprises a ceramic substrate; a metal layer is arranged on one or two surfaces of the ceramic substrate; a circuit is arranged on the metal layer; a chip groove is formed in a metal layer chip mounting position; and the chip is welded on the chip groove of the manufactured metalized ceramic substrate through a brazing technique. By virtue of the method, internal stress caused by mismatch of thermal expansion coefficients between the metal layer and the chip can be lowered as far as possible, and product reliability is improved.

The present invention specifically discloses a capacitive humidity sensor and a manufacturing method thereof, the capacitive humidity sensor comprises at least a first sensing member, a second sensing member, a third sensing member and a substrate, the sensing members are separately fixedly arranged on the surface of the substrate, the first sensing member comprises a heating electrode layer, an insulating layer, a first electrode layer, a second electrode layer and a moisture sensitive layer; the heating electrode layer of the first sensing member is arranged on the surface of the substrate in an overlaying manner, the insulating layer is arranged on the outer surface of the heating electrode layer in the overlaying manner, and extends to the surface of the substrate, the first electrode layer, the moisture sensitive layer and the second electrode layer are successively arranged on the outer surface of the insulating layer in the overlaying manner in the direction from the substrate to the insulating layer, the surface of the second electrode layer is provided with a through hole communicating the moisture sensitive layer; compared with the first sensing member, the second sensing member and the third sensing member do not include a heating electrode layer, and the surface of a second electrode layer of the third sensing member is not provided with a through hole. The capacitive humidity sensor is simple in structure, various layers are solidly contacted, poor contact or falling-off is less prone to occur, the electrode parasitic resistance can be reduced, and the sensor low temperature performance can be enhanced.

The invention relates to a molybdenum aluminum molybdenum etching solution. Based on a total weight, the molybdenum aluminum molybdenum etching solution comprises: 35-45% of phosphoric acid, 1-3% of nitric acid, 8-12% of glacial acetic acid, 0.5-1.0% of additives and 39-55.5% of deionized water. The additives comprise organic polybasic phosphonic acid substance, amine substance and salt substance.The molybdenum aluminum molybdenum etching solution provided by the invention can meet the customers' requirements for etching angle and etching amount, improves the product's excellent and good rate, at the same time greatly lowers the phosphoric acid content, and reduces the problem of uneven local etching caused by excessive phosphoric acid concentration.

The present invention is directed to a method and apparatus for etching the interior of a mold. In one implementation of the invention the interior of a mold is coated with an acid-resistant material. A photosensitive laminate is partially exposed to light, with only those areas that are to be etched being exposed. The laminate is subsequently developed to remove that portion of the laminate that has been exposed. This removed portion corresponds to the portion of the mold that is to be etched. After development the laminate is positioned in the interior of the mold over the acid-resistant coating, and then portions of the acid-resistant material are abrasively removed. The laminate is lightly wetted in some implementations in order to make it more flexible and stretchable, thereby allowing it to more readily conform to the interior surface of the mold. The intact portions of the photosensitive laminate (those portions that were not exposed to the light) provide protection to the acid-resist material, while the developed and removed portions of the photosensitive laminate provide little or no protection.

The invention provides a manufacturing method of a three-dimensional memory. The method specifically comprises the steps: providing a substrate, wherein a channel through hole penetrating through a whole stacking layer in the height direction of the substrate is formed in the stacking layer on the substrate, a silicon epitaxial structure is formed at the bottom of the channel through hole, and a first oxide layer, a nitride layer, a second oxide layer and a protective layer are sequentially formed on the side wall of the channel through hole and the upper surface of the silicon epitaxial structure; etching the protective layer on the upper surface of the silicon epitaxial structure to form a notch exposing the second oxide layer; etching the second oxide layer through the gap by adopting afirst wet process; etching the nitride layer by adopting a second wet process; and etching the first oxide layer by using a third wet process to expose the silicon epitaxial structure, wherein the first wet process and the third wet process employ the same corrosive agent, which is different from the corrosive agent used in the second wet process. According to the manufacturing method provided bythe invention, the channel through hole bottom structure which does not influence surrounding devices can be formed so as to ensure good electrical characteristic performance of the devices.

The invention relates to the field of preparation of semiconductor elements, and particularly discloses a preparation method of a semiconductor structure, which comprises the following steps: firstly, forming a dielectric layer on a substrate, forming a reflection-resistant layer on the dielectric layer, forming an A photoresist layer on the reflection-resistant layer, and exposing and developing the A photoresist layer. Under the effect of thereflection-resistant layer, the arc-shaped part of the dielectric layer at the gate structure does not reflect light, so that the problem that the patterned photoresist layer generates defects and is even stripped off is avoided, then the opening is etched, the reflection-resistant layer is removed, and finally the silicide layer is formed. the processing device is adopted to remove the anti-reflection layer, the processing device comprises a fixing shaft, a clamping mechanism, a loading tray and an adjusting mechanism, the clamping mechanism is used for clamping the loading tray, elements are loaded in the loading tray, and the adjusting mechanism is used for adjusting the clamping mechanism to intermittently and sequentially enter and exit from a dissolving tank, a flushing tank and a drying mechanism. The reflection-resistant layer layer on the element is dissolved, washed and dried, and automatic machining is achieved.