The invention provides a DLL
system based on a successive approximation
PID control algorithm. The
system comprises: a phase-locked output
clock rising
edge detection module, a reference
clock risingedge detection module, an error counting module, a successive approximation PID control module, and a variable mode frequency division module and an initialization module, furthermore, a
system clockis the main
clock of the entire system, a reference clock is a
clock signal that needs to be locked, a phase-locked output clock is a locked
clock signal, the system continuously and circularly adjusts the phase-locked output clock and finally outputs a
clock signal with a fixed
phase difference with the reference clock after a plurality of cycles The reference clock of the system can not only work at a
high frequency band, but also can work at a
low frequency band; no
delay line is required, so that the area can be reduced, and the
power consumption can be reduced; the problem of inconsistentdelay times of
delay units is avoided; and the design complexity is low, and the design can be easily implemented on FPGA and ASIC.