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Message expansion circuit of secure hash algorithm

A secure hash algorithm and circuit technology, applied in the protection of internal/peripheral computer components, etc., can solve problems such as high power consumption and achieve the effect of reducing power consumption

Active Publication Date: 2020-08-04
杭州德旺信息技术有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] The purpose of the present invention is to provide a message expansion circuit of a secure hash algorithm to solve the problem of large power consumption caused by the operation of the secure hash algorithm

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  • Message expansion circuit of secure hash algorithm
  • Message expansion circuit of secure hash algorithm
  • Message expansion circuit of secure hash algorithm

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Embodiment Construction

[0035] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, and do not limit the protection scope of the present invention.

[0036] In order to solve the problem of high power consumption caused by secure hash algorithm operations. This embodiment provides a message expansion circuit for a secure hash algorithm. The following embodiments take SHA256 as an example to illustrate the message expansion circuit of SHA256.

[0037] In order to obtain faster frequency and throughput in Bitcoin special-purpose chips, the usual practice is to use full pipeline implementation. Because SHA256 has 64 rounds of operations, there are a total of 64 levels of pipeline. Each stage processes a round of infor...

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Abstract

The invention discloses a message expansion circuit of a secure hash algorithm. The message expansion circuit comprises 64 stages of pipeline circuits, and each stage of pipeline circuit comprises 16groups of latches and a combinational logic circuit; the combinational logic circuit comprises four selectors, two shift XOR circuits and an adder. Each stage of pipeline circuit comprises a main clock; 16 groups of frequency division clocks with the phase difference of 1 in sequence are also generated, the 16 groups of frequency division clocks are respectively used as trigger clocks of 16 groupsof latches, and the clock frequency of the frequency division clocks is 1 / 16 of that of the main clock, i.e., the frequency division clocks respectively trigger the corresponding latches at the moments of 0-15 of the main clock; and the clock phase difference of the same group of latches in two adjacent stages of pipeline circuits is kept at 15. According to the message expansion circuit of the secure hash algorithm, the clock and flip rate of a sequential logic circuit are reduced to 1 / 16 of those of a traditional implementation, and the power consumption of the SHA256 message expansion circuit can be greatly reduced.

Description

technical field [0001] The invention belongs to the technical field of digital integrated circuits, and in particular relates to a message expansion circuit of a secure hash algorithm. Background technique [0002] Secure Hash Algorithm (Secure Hash Algorithm, abbreviated as SHA) is a family of cryptographic hash functions and is a secure hash algorithm certified by FIPS. An algorithm that can calculate a fixed-length string (also known as a message digest) corresponding to a digital message. And if the input messages are different, there is a high probability that they correspond to different strings. With the rapid development of the Internet of Things today, more and more terminals sensitive to power consumption are added to the network, and the application of the SHA algorithm is becoming more and more extensive. The traditional SHA algorithm is implemented by software, and its disadvantage is that the calculation speed is slow and occupies the CPU. , implementing the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F21/72
CPCG06F21/72Y02D10/00
Inventor 方晗
Owner 杭州德旺信息技术有限公司
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