Design method and device for clock tree structure of system on chip, equipment and medium

Abstract

The invention provides a design method and device for a clock tree structure of a system on chip, equipment and a medium. The design method comprises the following steps: determining the maximum number of registers which are allowed to be conducted simultaneously by the system on chip; grouping all registers in the system on chip to obtain a plurality of register groups; wherein the number of registers in each register group is smaller than or equal to the maximum number; for each register group, performing clock tree design on each register in the register group to obtain a clock tree of eachregister group; respectively connecting the clock tree of each register group to a main clock path of the system-on-chip; according to the clock length of each clock tree, adjusting the clock lengthof the clock signal on the main clock path reaching each register group; wherein the clock lengths of the clock signals reaching the register groups are different from each other. According to the invention, the number of registers which are overturned simultaneously can be reduced, the instantaneous power consumption of the system-on-chip is effectively reduced, and the impact on a power supply is reduced.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a design method, device, equipment and medium of a clock tree structure of a system on chip. Background technique [0002] During the working process of the system on chip, the power supply of the system on chip is not stable, but changes continuously with the working state of the system on chip over time. When the instantaneous power consumption of the system on chip is too large, it will affect the stability of the power supply and cause the power supply voltage to be pulled down. If the power supply voltage is too low, it may even cause logic errors. In order to avoid this kind of problem, it is necessary to put forward higher design requirements for the driving capability of the power supply, the response time of the output voltage, etc.; to put forward higher requirements for the load capacitance and the distributed coupling capacitance of the on-chip system, whi...

AI Technical Summary

Problems solved by technology

[0005] The present invention provides a design method, device, equipment and medium of a clock tree structure of a system on chip, the purpose of which is to solve the problem of simultaneous flipping of all registers in the system on chip, large instantaneous power consumption, and impact on the power supply

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