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SRAM storage unit, sram storage unit write operation method and sram memory

A storage unit and write operation technology, applied in static memory, digital memory information, information storage, etc., can solve problems such as data writing errors, and achieve the effect of reducing instantaneous power consumption and improving yield

Active Publication Date: 2017-11-10
GALAXYCORE SHANGHAI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Once the charging and discharging capabilities of each MOS tube change, the data may still be written incorrectly.

Method used

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  • SRAM storage unit, sram storage unit write operation method and sram memory
  • SRAM storage unit, sram storage unit write operation method and sram memory
  • SRAM storage unit, sram storage unit write operation method and sram memory

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Embodiment Construction

[0040] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, the present invention can be implemented in many other ways different from those described here, and those skilled in the art can make similar extensions without violating the connotation of the present invention, so the present invention is not limited by the specific implementations disclosed below.

[0041] Secondly, the present invention is described in detail by means of schematic diagrams. When describing the embodiments of the present invention in detail, for convenience of explanation, the schematic diagrams are only examples, which should not limit the protection scope of the present invention.

[0042] The inventor has analyzed and studied the failure of writing, and found that the reason for the failure of writing is that the charging and discharging conflicts of each tube may occur during the writing process.

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Abstract

The invention discloses an SRAM storage unit, a writing operation method of the SRAM storage unit and an SRAM memory. The SRAM storage unit includes: a data latch, a selection controller, a first transmission tube and a second transmission tube, the selection controller is connected to the power supply of the data latch, and is used to control the data latch The power supply of the converter is connected to the supply voltage or connected to the ground level. The write operation method includes: before performing a write operation on the SRAM storage unit, clearing the SRAM storage unit to discharge the first storage node and the second storage node to ground level. The invention can improve the reliability of the write operation of the SRAM storage unit and reduce the instantaneous power consumption during the write operation.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to an SRAM storage unit, an SRAM storage unit writing operation method and an SRAM memory. Background technique [0002] According to the different ways of storing data, semiconductor memory can be divided into two categories: random access memory (RAM) and read-only memory (ROM). Random access memory (RAM) can be divided into static random access memory (SRAM) and dynamic random access memory (DRAM). Compared with DRAM, SRAM has faster read and write speeds. Moreover, SRAM does not need to periodically refresh the stored information, and its design and manufacture are relatively simple. [0003] The storage unit is the most basic and important component of the SRAM memory, occupying most of the entire SRAM memory area. The stability of the storage unit determines the data reliability of the memory. [0004] The mainstream SRAM memory cell is a six-transistor cell (6T). ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C11/413
Inventor 赵立新董小英俞大立乔劲轩
Owner GALAXYCORE SHANGHAI
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