68results about How to "Raise the eigenfrequency" patented technology

The invention relates to a SiGe bipolar complementary metal oxide semiconductor (BiCMOS) radio-frequency power amplifier. The amplifier comprises a first-stage pre-amplification transistor, a second-stage power amplification transistor, a first-stage biasing circuit, a second-stage biasing circuit, an input matching network and an impedance conversion network. The circuit structure of the invention consists of a first-stage pre-amplification circuit and a second-stage power amplification circuit which are connected with each other through a coupling capacitor. The first-stage pre-amplification transistor is a standard SiGe transistor, and the linearity of the circuit is enhanced by a remote control (RC) serial feedback circuit; and the second-stage power amplification transistor is a high-voltage SiGe transistor and can reach relatively high output power. Both the first biasing circuit and the second biasing circuit have bipolar transistor current mirror structures, and temperature stability is enhanced by temperature negative feedback technology. The amplifier has high linearity and relatively high output power.

The invention belongs to the technical field of semiconductor photoelectrons, and relates to a base-region-gradient uni-traveling-carrier double-heterojunction phototransistor (UTC-DHPT) detector capable of realizing high responsivity and high cut-off frequency. The detector comprises an InP substrate, an emitting electrode, a base electrode and a collector electrode; an InP buffer layer, an InGaAsP secondary collector region, an InGaAsP collector region, two InGaAsP transition layers different in material band gap wavelength, an InGaAsP base region gradient in material band gap wavelength, an InP emitting region, an InP cover layer and an InGaAs Ohmic contact layer are prepared on the InP substrate in sequence by the aid of a metal-organic chemical vapor deposition (MOCVD) method; the emitting electrode is produced on the InGaAs Ohmic contact layer by a sputtering method; the base electrode is produced on the InGaAsP base region through the sputtering method; the collector electrode is produced on the InP substrate through a vapor deposition method.

The invention belongs to the technical field of semiconductor devices, and particularly relates to a field-induced tunneling enhanced HEMT (high electron mobility transistor) device. The field-induced tunneling enhanced HEMT device is different from conventional AlGaN / GaN HEMT devices in that metal sources are in Schottky barrier contact instead of ohm contact in conventional structures; and metal gates are not positioned between the sources and drains but form insulating gate electrodes at the edges, away from the drains, of the sources through etching grooves. Field-control conductive channels are realized by means of the insulating layer and groove technology, field control of the field-control conductive channels is realized by voltage applied to the groove gate electrodes, and electrons subjected to band bending can directly tunnel barriers to be accumulated below the channels in gate modulation when forward voltage is applied to the gate electrodes, so that normally closed channels are realized, and frequency characteristics of the device can be promoted without affecting reverse voltage withstand capability of the device. Meanwhile, the preparation process of the device is compatible to traditional processes, and thereby solid foundation is established for the GaN power integration technology.

A lithographic apparatus includes a support constructed to support a patterning device, the patterning device being capable of imparting a radiation beam with a pattern in its cross-section to form a patterned radiation beam; a substrate table constructed to hold a substrate on a central area; and a projection system configured to project the patterned radiation beam onto a target portion of the substrate in a first direction. The apparatus further includes a positioning device to position the substrate table, wherein the positioning device includes a plurality of actuators arranged to, in use, exert forces to position the substrate table, the forces substantially being directed in a plane substantially perpendicular to the first direction and wherein the plurality of actuators are arranged outside a central volume of the substrate table, the central volume being obtained by projecting the central area along the first direction.

The invention discloses a full-difference E-type power amplifier. The amplifier is a circuit composed of a Bipolar device, a CMOS device and a passive device, wherein a difference input pair is the Bipolar device; a cross coupling pair is an NMOS tube; the amplifier adopts a two-stage structure, the first pre-amplifying stage performs a pretreatment for an input constant envelope signal so as to meet the requirement for fast opening and closing of the second power amplifying stage; and the cross coupling pair structure is added into each stage so as to accelerate the on / off speed, satisfy high frequency application and reduce the width length ratio of a main switching pipe. Meanwhile, the difference input also avoids the influence of a second harmonic wave on a substrate, completely filters and removes secondary and high and even order harmonic waves and eliminates the substrate coupling such that the device is not easy to puncture. The invention has the following advantages of high power efficiency, low harmonic distortion, low power voltage, simple structure, fast working speed and low power consumption and the like.

A timing cover for an engine includes a plurality of dome-shaped embossed portions formed at positions of the timing cover that are most susceptible to vibration, based on an analysis of vibration modes of the timing cover.

The invention discloses a super junction collector region SiGe heterojunction bipolar transistor. According to the transistor, a super junction collector region structure where n-type semiconductor columns and p-type semiconductor columns are alternately arrayed is adopted; a transverse electric field is introduced, collector region electric field distribution is improved, and then the breakdown voltage of the device is improved. According to a base region Ge component, the staircase distribution structure where gradual increase occurs from the side of an emitter junction to the side of a collector junction is adopted; a minority carrier acceleration electric field is introduced, the base region transit time is effectively shortened, and then the characteristic frequency of the device is improved. The current gain of the device and the temperature sensitivity of the characteristic frequency are improved, drift of a static working point of the device is effectively avoided, and stable work of the device is facilitated. Compared with a conventional power heterojunction bipolar transistor, the super junction collector region SiGe heterojunction bipolar transistor has the advantages that the transistor has the high breakdown voltage characteristic and the excellent frequency characteristic, the static working point of the device can not easily deviate during working and can not easily drift along with the change of the working temperature, and stable work of the device in the field of sub-terahertz power application can be achieved.

A timing cover for an engine includes a plurality of dome-shaped embossed portions formed at positions of the timing cover that are most susceptible to vibration, based on an analysis of vibration modes of the timing cover.

The invention discloses a vertical type PNP triode in a SiGe BiCMOS process and a manufacturing method thereof. The vertical type PNP triode comprises a collector region, an outer isolation region, a base region, and an emission region. The collector region is composed of first P type impurity regions and P type burying layers; the P type burying layers are formed at shallow groove field oxygen bottoms that are at two sides of an active area as well as are adjoined with the active area; deep hole contacts are formed at the tops of the P type burying layers so as to lead out collectors. The outer isolation region includes N type burying layers that formed at the shallow groove field oxygen bottoms that are at the two sides of the active area; and there are lateral separations between the N type burying layers and the P type burying layers. The base region comprises an intrinsic base region and an outer base region. The intrinsic base region is formed by an N type silicon epitaxial layer that is formed at the upper portion of the active area. The emission region is formed by a P type SiGe epitaxial layer and a polysilicon layer, wherein the P type SiGe epitaxial layer is formed on the intrinsic base region. In addition, the invention also discloses a manufacturing method of the vertical type PNP triode in the SiGe BiCMOS process. According to the invention, a characteristic frequency of the PNP triode can be improved; the PNP triode can be integrated into a current process; flexibilities of the PNP triode design can be improved.

The invention belongs to microelectronic technology and in particular to a tunable film bulk acoustic resonator (FBAR) comprising a substrate, a cavity, a bottom electrode layer, a tuning layer and apiezoelectric oscillation stack. The piezoelectric oscillation stack comprises an intermediate electrode layer, a piezoelectric layer, and a top electrode layer. A DC bias voltage is applied to the intermediate electrode layer and the bottom electrode layer. The FBAR DC bias voltage is applied to the bottom electrode and the intermediate electrode, the tuning layer has a piezoelectric characteristic, and the bottom electrode layer is in an annular shape. Thus, under a low DC bias voltage, the FBAR can produce a large offset displacement, resulting in a large change in characteristic frequency.Therefore, the large resonance frequency adjustment of the FBAR can be realized at a low voltage, thereby greatly expanding the application range of the FBAR.

The invention relates to a two-wire system built-in charge amplifying circuit based on a field-effect tube and belongs to the technical field of low-noise two-wire system charge-voltage conversion amplifying circuit and structure design. According to the invention, at an input stage, the change in a small-signal voltage-controlled current of a field-effect tube is adopted for realizing the impedance conversion from a high internal resistance alternating charge signal to a low internal voltage signal; a biasing circuit is formed by resistance differential pressure; a signal passes by a common base current follower formed by a PNP bipolar transistor and a common emitter output circuit formed by a NPN bipolar transistor and then is compounded with a power supply, so that the two-wire system signal transmission can be formed; an input end filtering capacitor can realize the reduction of noise interference; and a signal voltage is compounded and overlapped with a direct current bias voltage. The field-effect tube is low in noise and the field-effect tube and the bipolar transistor are high in characteristic frequency, so that the circuit frequency response range is wide, and the output driving capacity is higher; few electron components are used, and the resistance elements are subjected to resistance slurry sintering and laser resistor trimming and are easy to integrate and control precision; and a circuit base plate is made from aluminum oxide ceramics, so that the structure strength is high.

The invention provides a particle-optical device for irradiating an object with a beam of particles. The device comprises a housing in which are located positioning means 1 for positioning the object within the housing. The positioning means comprise a reference body 2 supported against a supporting portion of the housing and a kinematic system - which can be manipulated - with an object carrier 9 for manipulating the object held in the object carrier in at least one degree of freedom with respect to the reference body 2, the device further comprising control means and at least one combination 23,30 of a piezo-electric position actuator 25 and a piezo-electric force sensor 35, which actuator and sensor are positioned in series, whereby the control means - in dependence upon at least one input signal from at least one sensor - generates a control signal for at least that actuator associated with said sensor, characterized in that the series-positioned actuators and sensors of said at least one combination are positioned between the housing and the reference body, the support of the reference body against the supporting portion of the housing occurring via said at least one combination.

The invention provides a power amplifier, which comprises a common emitter amplification stage module, an emitter following module and a power amplification stage module. The emitter following module comprises at least one transistor. The output end of the common emitter amplification stage module is connected with the base of the transistor. The power amplification stage module is connected with the emitter following module. The invention is applied to a wireless local area network and has the advantages of high linearity degree, low power dissipation, on-chip total integration and the like.

The invention relates to a droplet break up device comprising: a chamber (2) for containing a printing liquid (3) comprising a bottom plate (4); a pump for pressurizing the printing liquid; an outlet channel (5) having a central axis, provided in said chamber for ejecting the printing liquid; and an actuator (7) for breaking up a fluid jetted out of the -outlet channel. The actuator is provided around the outlet channel, arranged to symmetrically impart a pressure pulse central to the outlet channel axis. Accordingly, smaller droplets can be delivered at higher frequencies.

The invention discloses a heterojunction bipolar transistor, and particularly relates to an ultra-wide temperature area high-thermal-stability microwave power SiGe heterojunction bipolar transistor. According to the ultra-wide temperature area high-thermal-stability microwave power SiGe heterojunction bipolar transistor, a stepped distribution structure that the number of base region Ge components gradually increases from an emitter junction side to a collector junction side is adopted, current gain of a device slows down along with the trend of temperature changes, and drifting of a quiescent operating point of the device can be prevented in a wide temperature area; meanwhile, the ultra-wide temperature area high-thermal-stability microwave power SiGe heterojunction bipolar transistor can improve the characteristic frequency of the device and sensitivity of changes, along with the temperature, of the device. In addition, due to the fact that the non-equal finger separation distance symmetrical structure that indexes of the finger separation distances of emitter electrode fingers increase from the two sides of the device to the center of the device is further adopted by the ultra-wide temperature area high-thermal-stability microwave power SiGe heterojunction bipolar transistor, the phenomenon that heat of emitter electrode fingers on the outer side flows into the center can be effectively prevented from happening, the purpose of reducing thermal coupling effect among emitter electrode fingers and the purpose of improving uniformity of distribution of the temperature of an active area of the device are achieved, and the purpose of improving the thermal stability of the ultra-wide temperature area high-thermal-stability microwave power SiGe heterojunction bipolar transistor is achieved.

The invention discloses a GaAs based composite collecting region trajectory transmitting heterojunction bipolar transistor comprising, a semi-insulating GaAs substrate, a N#+[+] adulterated GaAs collecting sub-region grown on the semi-insulating GaAs substrate, a composite collecting region grown on the N#+[+] adulterated GaAs collecting sub-region, a heavy type P GaAs base grown on the composite collecting region. On the base region a type N InGaP emitting region is formed the top of which is a cap layer used for making Ohm contact, an emitting electrode is formed on the cap layer, and a base electrode is formed on the type N InGaP emitting region on the base region.

The invention discloses a silicon germanium heterojunction NPN (negative-positive-negative) triode. A collector region is formed in an active region, is connected with N-type pseudo buried layers formed at the bottoms of shallow trench field oxides on two sides of the active region and a collector electrode is guided out through deep-hole contact. The silicon germanium heterojunction NPN triode further comprises a collector region implantation window formed by etching silicon dioxide, P-type polycrystalline silicon and silicon nitride, a lateral wall indent structure is formed by horizontally etching the silicon dioxide, a P-type silicon germanium epitaxial layer is formed at the bottom of the window, the lateral wall indent structure and the P-type polycrystalline silicon contacting with the silicon germanium epitaxial layer serve as an intrinsic base region and outer base regions, inner spacers are formed on the inner side walls of the window, and an emitter region consists of N-type polycrystalline silicon which is filled into the window and extends out of the window from the top of the window. The invention further discloses a manufacture method for the silicon germanium heterojunction NPN triode. The silicon germanium heterojunction NPN triode has the advantages that use of photomasks can be decreased, cost can be reduced, the dimension of the triode can be reduced, parasitic resistance can be reduced and characteristic frequency can be improved.

The invention relates to a SiGe bipolar complementary metal oxide semiconductor (BiCMOS) radio-frequency power amplifier. The amplifier comprises a first-stage pre-amplification transistor, a second-stage power amplification transistor, a first-stage biasing circuit, a second-stage biasing circuit, an input matching network and an impedance conversion network. The circuit structure of the invention consists of a first-stage pre-amplification circuit and a second-stage power amplification circuit which are connected with each other through a coupling capacitor. The first-stage pre-amplification transistor is a standard SiGe transistor, and the linearity of the circuit is enhanced by a remote control (RC) serial feedback circuit; and the second-stage power amplification transistor is a high-voltage SiGe transistor and can reach relatively high output power. Both the first biasing circuit and the second biasing circuit have bipolar transistor current mirror structures, and temperature stability is enhanced by temperature negative feedback technology. The amplifier has high linearity and relatively high output power.

The invention discloses a transverse SiGe heterojunction bipolar transistor with adjustable doping concentration. The transverse SiGe heterojunction bipolar transistor is an NPN type or PNP type transverse SiGe HBT (Heterojunction Bipolar Transistor). By applying a positive voltage to a substrate electrode below an emitter region and a base region of an NPN type device (or applying a negative voltage to a substrate electrode below an emitter region and a base region of a PNP type device), the doping concentration of the emitter region can be increased, the doping concentration of the base region can be reduced, and meanwhile, the current gain and the characteristic frequency can be improved. By applying a negative voltage to a substrate electrode below a collector region of the NPN type device (or applying a positive voltage to a substrate electrode below a collector region of the PNP type device), the doping concentration of the collector region can be reduced, and the breakdown voltage can be improved. Compared with a conventional transverse SiGe HBT, the doping concentrations of the three regions can be independently adjusted by changing the external voltages applied to the substrate electrodes below the emitter region, the base region and the collector region, so that the characteristic frequency, the current gain and the breakdown voltage are synchronously improved.

The invention discloses a preparation method of a miniature supercapacitor capable of being used for kHZ alternating current linear filtering. By the method, the problems that a traditional aluminum electrolytic capacitor is large in size and small in characteristic frequency are mainly solved. According to the implementation scheme, the method comprises the following steps of 1) making a patterned photoresist-target substrate on a target substrate through photoetching; 2) depositing a metal current collector on the patterned substrate by using an electron beam evaporation device to form a metal current collector / photoresist-target substrate structure, and cleaning the metal current collector / photoresist-target substrate structure by using a plasma oxygen device; 3) manufacturing an electrode material coating on the surface of the cleaned metal current collector and removing the photoresist to form an electrode material-metal current collector-target substrate structure; and 4) dispensing an electrolyte on the surface of an electrode material, leading out positive and negative electrode leads, and packaging with PDMS to complete the manufacturing of the miniature supercapacitor device. The manufactured device is small in size and electrode size, the characteristic frequency can reach kHz or above, and the preparation method can be used for manufacturing a miniature rectifying circuit.

The invention discloses a low-power-consumption high-speed comparator which comprises four PMOS tubes, four NMOS tubes, two first buffers, two OR gates, a first analog signal input end, a second signal input end, a first comparison result output end, a second comparison result output end and a clock control end. When the clock control end qamp is at a high level, the comparator is in a reset state. When the clock control end qamp jumps from a high level to a low level, the comparator is in a comparison state. After the comparator completes comparison, the comparator enters a latch state, and an output result is kept unchanged. According to the low-power-consumption high-speed comparator, small input mismatch voltage can be obtained by increasing the size of an input tube; the low-power-consumption high-speed comparator fully utilizes the property of high characteristic frequency of the NMOS tubes, increases the conversion speed of the comparator, has simple circuit structure and is suitable to be used in a high-speed conversion circuit.

The invention discloses a linear actuator, a hydraulic bearing, and a motor vehicle with such a hydraulic bearing or linear actuator. The invention relates to an electromagnetic linear actuator (16) with a stator (18) and an armature (20) which can be moved relative to the stator (18). The stator (18) has at least one permanent magnet (22) and at least one coil (24), the stator (18) has a conductive element (26) made of a ferromagnetic material, the conductive element (26) extends over the at least one permanent magnet (22) and / or the at least one coil (26), and the armature (18) forms a yoke (34) made of a ferromagnetic material in the longitudinal direction L for the conductive element (26). The invention further relates to a hydraulic bearing (2) with a support spring (36), a working chamber (4), which is filled with a hydraulic fluid, a compensating chamber (6), a partition (8) which is arranged between the working chamber (4) and the compensating chamber (6), a throttle channel (10) which is formed between the working chamber (4) and the compensating chamber (6) for exchanging hydraulic fluid, and a control membrane (12) which is paired with the partition (8) and which is designed to change a working chamber volume (14) of the working chamber (4). The hydraulic bearing (2) has an electromagnetic linear actuator (16) according to the invention, and the armature (20) is mechanically connected to the control membrane (12). The invention additionally relates to a motor vehicle with such a hydraulic bearing (2).

The invention discloses a broadband large dynamic range logarithmic detector, and belongs to the technical field of broadband detectors. The broadband large dynamic range logarithmic detector comprises an amplitude limiting amplifier module, a rectifier module and an adder module, wherein the limiting amplifier module is used for carrying out limiting amplification on an input signal; the rectifier module is used for converting an input signal of the limiting amplifier module into a detection current; and the adder module is used for gathering the detection currents of the plurality of rectifier modules to a resistor and converting the detection currents into the voltage output. The broadband large dynamic range logarithmic detector has the functions of wide frequency range input and largedynamic range output, can cover a wider signal transmission rate and a larger signal power range, and meets the strict requirements of systems, such as a high-integration-level receiver, a high-precision receiver, a high-sensitivity receiver, a large dynamic range receiver, etc., on the performance of the detector.

The invention provides a heat flow-based power semiconductor device characteristic frequency extraction method, which comprises the steps of applying step loss to a power semiconductor device, and recording a time domain thermal impedance curve and an output heat flow curve of the device; carrying out frequency domain conversion on the time domain thermal impedance curve to obtain a frequency domain thermal impedance model and the characteristic frequency number and interval thereof; fitting the time domain output heat flow curve in combination with the characteristic frequency of the frequency domain thermal impedance model, and extracting the characteristic frequency value of the power semiconductor device; furthermore, carrying out curve fitting on the time domain thermal impedance curve. The accuracy of the characteristic frequency of the frequency domain thermal impedance model is improved. Correspondingly, the invention further provides a system corresponding to the method, a terminal and a medium. According to the method and system, the parameter extraction process of the frequency domain thermal impedance model is simplified, and the parameter accuracy is improved.

The invention discloses a si-ge heterojuncition NPN (negative-positive-negative) triode device, which comprises a collector area, an N-type buried layer, a P-type si-ge epitaxial layer, an emitter window, an intrinsic base area, an outer base area and an emitting area, wherein the collector area is formed in an active area and connected with the N-type pseudo buried layers formed at the bottom of shallow trench field oxygen of two sides of the active area, a collector electrode is guided out through deep hole contact, the emitter window is formed by etching P-type silicon and silicon nitride which are formed on the P-type si-ge epitaxial layer, the intrinsic base area is formed by the P-type si-ge epitaxial layer at the bottom of the emitter window, the outer base area is formed by the P-type si-ge epitaxial layer outside the emitter window and the P-type silicon, an inner side wall is formed on the inner wall of the window, and the emitting area is formed by N-type polycrystalline filled in the emitter window and extending to the outside of the window from the top. The invention further discloses a manufacturing method of the si-ge heterojunction NPN triode device. The size of the si-ge heterojunction NPN triode device and parasitic resistance of the collector electrode can be reduced, characteristic frequency of the device can be increased, process procedures can be simplified, process cost can be reduced and accurate control of process size can be realized.

The invention provides a manufacturing method of a multi-frequency CMUT device and the multi-frequency CMUT device. The method comprises the steps: selecting a high-concentration doped silicon wafer as a substrate to manufacture a silicon-based layer; arranging an insulating layer on the upper surface of the silicon-based layer; depositing amorphous silicon on the upper surface of the insulating layer to prepare a sacrificial layer and define a CMUT unit, wherein the sacrificial layer comprises a circular main body and a plurality of release channels connected with the circular main body; depositing a vibration film on the CMUT unit; forming a corrosion hole in the opening position of each release channel, and releasing the sacrificial layer to form a cavity; sealing the corrosion hole after the sacrificial layer is released; etching a supporting wall with a preset width around a cavity formed by the circular main body by using a photoetching process; performing a deep etching operation to the silicon-based layer so as to deposit a bottom electrode; and depositing a connecting wire between the electrode and a device, and depositing a top electrode on the upper surface of the vibration film.

The invention discloses a high-precision piezoelectric sensor. The high-precision piezoelectric sensor comprises a base, a first adhesive layer, a piezoelectric film layer, a second adhesive layer anda mass block, wherein the first adhesive layer, the piezoelectric film layer, the second adhesive layer and the mass block are arranged on the base in sequence; the mass block comprises a body, at least one protruding part located at the bottom of the body and at least one vacancy part adjacent to the protruding part; the protrusion part is in contact with the second adhesive layer, and the height of the vacancy part is larger than the thickness of the second adhesive layer. The piezoelectric film layer is laminated on the base through the first adhesive layer, and the mass block is stacked on the piezoelectric film layer through the second adhesive layer, so that the piezoelectric film layer, the first adhesive layer and the second adhesive layer are connected; a center column does not need to be arranged, the problem that the mass of a traditional compression type acceleration sensor is eccentric can be avoided, mechanical parts are reduced, and the resonance frequency and uniformity of the device are further adjusted. Furthermore, the vacancy part can be arranged at the bottom of the mass block, so that the precision of the device is improved by reducing the contact area between the mass block and the piezoelectric film layer and reducing the weight of the mass block.

The invention discloses a method for manufacturing a shallow junction complementary bipolar transistor. The main technological steps of the method are as follows: 1) forming an SOI material chip by the methods of silicon / silicon bonding, thinning and polishing; and 2) manufacturing the shallow junction complementary bipolar transistor by using the methods of deep-trench etching, deep trench isolation with polysilicon backfilling and a shallow isolation wall and combining with a longitudinal NPN pipe with a shallow junction polysilicon emitter and the complementary bipolar technology which is compatible with the longitudinal PNP pipe. The method improves the pressure resistance (BVCEO is greater than 5.0V) and the Early voltage of the complementary bipolar transistor and simultaneously takes into consideration of the characteristic frequency. The method greatly reduces the drain current of an isolation junction, and the drain current of the shallow junction complementary bipolar transistor is smaller than 10<minus 12>A. The method can be widely applied in the field of manufacture of high-speed complementary bipolar technologies.

The present invention discloses an electrode lead-out structure in a STI (Shallow Trench Isolation) process, wherein an active region is isolated by a shallow trench, a buried layer is formed at the bottom of the shallow trench, the buried layer enters into the active region and connects with a doped area 1 where the electrode is needed to be led out in the active region, and a deep-groove contact hole is manufactured in an oxide layer of the shallow trench to connect with the buried layer so as to lead the electrode out of the doped area 1. The electrode lead-out structure in the present invention can reduce area of the device, reduce resistance and parasitic capacitance of the led-out electrode, and improve characteristic frequency of the device.