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116results about How to "Reduce contact resistivity" patented technology

Production technology of all-back electrode solar battery

The invention discloses a production technology of an all-back electrode solar battery. The production technology comprises the steps of: (1) forming a back n+ diffusion layer area and a back p+ diffusion layer area, which are arranged in a finger-crossed manner, on the back surface of a n type silicon substrate, and forming a front surface n+ diffusion layer on the front surface of the n type silicon substrate; (2) carrying out annealing oxidation treatment on the n type silicon substrate to form an oxide layer; (3) deposing passivation layers on the front surface and the back surface of the n type silicon substrate, and deposing a reflection increasing film on the passivation layer on the front surface; and (4) printing conductive slurry on the back passivation layer, after sintering, forming contact electrodes respectively on the back p+ diffusion layer area and the back n+ diffusion layer area, and finishing the preparation of the all-back electrode solar battery. According to the invention, the single conductive slurry is printed on the passivation layers of the back p+ diffusion layer and the back n+ diffusion layer at the same time, the finger-crossed conductive electrodes low in contact resistance are formed on the p+ diffusion layer and the n+ diffusion layer after the sintering, the production technology of the IBC battery is simplified, and the production cost of the IBC battery is lowered.
Owner:SICHUAN YINHE STARSOURCE TECH CO LTD

Elevated source and drain elements for strained-channel heterojuntion field-effect transistors

A semiconductor structure having a surface layer disposed over a substrate, the surface layer including strained silicon. A contact layer is disposed over a portion of the surface layer, the contact layer including a metal-semiconductor alloy. A bottommost boundary of the contact layer is disposed above a bottommost boundary of the surface layer.
Owner:TAIWAN SEMICON MFG CO LTD

Method for Reducing Contact Resistance in MOS

A method for growing a III-V semiconductor structure on a SinGe1-n substrate, wherein n is from 0 to 1 is provided. The method includes the steps of: (a) bringing a SinGe1-n substrate to a high temperature; (b) exposing the area to a group V precursor in a carrier gas for from 5 to 30 min, thereby forming a doped region at said area; (c) bringing the SinGe1-n substrate to a low temperature; (d) exposing the doped region to a group III precursor in a carrier gas and to a group V precursor in a carrier gas until a nucleation layer of III-V material of from 5 to 15 nm is formed on the nucleation layer; (e) bringing the SinGe1-n substrate to an intermediate temperature; and (f) exposing the nucleation layer to a group III precursor in a carrier gas and to a group V precursor in a carrier gas.
Owner:INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)

Light-emitting diode with transparent electrode and preparation method

The invention discloses a light-emitting diode with a transparent electrode and a preparation method. The light-emitting diode with the transparent electrode comprises a gallium nitride epitaxial wafer. In the gallium nitride epitaxial wafer, a transparent conductive film layer is covered on a P-type gallium nitride layer, and is a titanium/zinc oxide or titanium oxide/zinc oxide composite transparent conductive film. The titanium/zinc oxide composite transparent conductive film comprises a titanium layer covered on the P-type gallium nitride layer and a zinc oxide layer covered on the titanium layer. The titanium oxide/zinc oxide composite transparent conductive film comprises a titanium oxide layer covered on the P-type gallium nitride layer and the zinc oxide layer covered on the titanium oxide layer. In the light-emitting diode with the transparent electrode, the material of the transparent conductive film layer on the P-type gallium nitride layer in the gallium nitride epitaxial wafer of the diode is improved to reduce the contact resistivity of the transparent conductive film layer, improve light transmittance and the luminous efficiency of the light-emitting diode with the transparent electrode and prolong the service life of the light-emitting diode with the transparent electrode.
Owner:XIANGNENG HUALEI OPTOELECTRONICS

Nitride semiconductor based light-emitting device and manufacturing method thereof

An object of the present invention is to provide a nitride semiconductor based light-emitting device, which is low in operating voltage reduction and is high in performance, and a manufacturing method thereof.A first metal film is formed on a P-type conductive nitride semiconductor formed on a substrate, and then, a film (WOX) made of tungsten oxide is formed in superimposition, followed by annealing.
Owner:USHIO OPTO SEMICON

p-type GaN epitaxial wafer with high ohmic contact features and preparation method thereof

The present invention provides a p-type GaN epitaxial wafer with high ohmic contact features and a preparation method thereof. The preparation method comprises the steps of: the step 1: preparing a substrate (10); the step 2: performing epitaxial growth of an Mg-doped GaN layer on the substrate (10); the step 3: performing annealing for the Mg-doped GaN layer to activate a magnesium acceptor in the Mg-doped GaN layer to convert the Mg-doped GaN layer to a p-type GaN epitaxial layer (11); and the step (4): performing epitaxial growth of a p++-type GaN cover layer (12) on the p-type GaN epitaxial layer (11). The heavily-doped p++-type GaN cover layer is grown on the p-type GaN layer, and the heavily-doped p++-type GaN cover layer does not perform high-temperature annealing to improve the quality of the ohmic contact layer of the epitaxial wafer and reduce the specific contact resistance rate of the contact of the p-type material and the metal.
Owner:INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI

Method for reducing Ohmic contact resistivity of gallium nitride high electron mobility transistor

The invention provides a method for reducing Ohmic contact resistivity of a gallium nitride high electron mobility transistor. The method comprises the following steps: a photoresist layer is formed by coating photoresist on a wafer surface via spin coating operation, a source electrode area and a drain electrode area are etched on the photoresist layer via photoetching processes, and the source electrode area and the drain electrode area are exposed on the wafer surface; argon ions are sputtered on parts, positioned in the source electrode area and the drain electrode area, of the wafer surface; the argon ions are enabled to bombard the wafer surface; a source metal electrode and a drain metal electrode are formed by sputtering metal on the parts, positioned in the source electrode area and the drain electrode area, of the wafer surface; the photoresist layer is peeled off, and the source metal electrode and the drain metal electrode are enable to be in Ohmic contact with each other via adoption of high temperature rapid thermal annealing processes. Via the above mode, the method for reducing Ohmic contact resistivity of the gallium nitride high electron mobility transistor can help increase concentration of N vacancy in a semiconductor, and low Ohmic contact resistivity can be obtained via high temperature thermal annealing alloying technologies.
Owner:CHENGDU HIWAFER SEMICON CO LTD
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