46results about How to "No increase in process cost" patented technology

The embodiment of the invention discloses an AMOLED pixel driving circuit, a pixel driving method and a display panel. According to the embodiment of the invention, all or part of the thin film transistors in the AMOLED driving circuit are double-gate thin film transistors; the adjustability of the threshold voltage of the switching TFT is realized through the double-gate type thin film transistor; the negative bias of the threshold voltage of the second thin film transistor serving as the switching TFT is prevented, the data voltage is helped to be stably stored in the storage capacitor, thedisplay panel image flickering phenomenon caused by data loss is prevented, so that the display effect and quality of the display panel are improved.

The invention discloses a shield gate trench power device. A gate structure of a device unit region comprises a shielding dielectric layer formed on the inner side surface of a gate trench; the shielding dielectric layer is formed by superposing a thermal oxidation layer and a CVD dielectric layer; active polycrystalline silicon is filled in a gap region formed by filling the shielding dielectriclayer; top trenches formed by etching part of the shielding dielectric layer close to the side surface of the gate trench are formed in two sides of the source polysilicon, and the top trenches are completely located in the thermal oxide layer; the shielding dielectric layer between the second side surface of the top trench and the source polysilicon is used as an inter-polysilicon dielectric layer; the top trench is filled with a polysilicon gate, and a gate dielectric layer is formed on the first side surface of the top trench. The invention further discloses a manufacturing method of the shield gate trench power device. According to the invention, the thickness uniformity of the side wall and the bottom shielding dielectric layer of the trench can be improved, so the voltage resistanceof the device can be ensured, the on resistance of the device can be reduced, and the gate-source capacitance of the device can be reduced.

The invention discloses an N-type lateral double-diffused metal oxide semiconductor field effect transistor with a charge-adjustable field plate, comprising: a P-type semiconductor substrate, on which an N-type drift region and a P-type semiconductor substrate are arranged. type well, an N-type source region, a P-type contact region, and a gate oxide layer are arranged on the P-type well, and an N-type drain region and a field oxide layer are arranged on the N-type drift region, and it is characterized in that the field oxide layer There are multiple charge-adjustable field plates on the surface, and each charge-adjustable field plate is connected with a metal induction layer, and a source metal is connected to the P-type contact area and the N-type source area, and the source metal Completely cover all metal sensing layers. This structure can obtain a uniform surface lateral electric field distribution in the entire drift region of the device, has a high lateral withstand voltage capability, and can increase the doping concentration of the drift region of the device while maintaining a high breakdown voltage, thereby obtaining low conduction resistance.

The invention relates to a semiconductor memory unit, a driving method thereof and a semiconductor memory, wherein the semiconductor memory unit comprises silicon on an insulator, a first diffusion region, a second diffusion region, a grid dielectric layer, a grid electrode, a first electric charge storage region and / or a second electric charge storage region, wherein the first diffusion region and the second diffusion region are positioned in top-layer silicon and mutually separated, and the conduction types of the first diffusion region and the second diffusion region are the same; the griddielectric layer and the grid electrode are sequentially positioned on the top-layer silicon above a channel region; and the first electric charge storage region and / or the second electric charge storage region are / is respectively positioned in the grid dielectric layer and close to the part between the channel region and the first diffusion region and in the grid dielectric layer and close to the part between the channel region and the second diffusion region, and the first electric charge storage region and / or the second electric charge storage region are / is formed through electric field force. In the invention, the first electric charge storage region and / or the second electric charge storage region are / is formed in the grid dielectric layer through the electric field force to form thememory unit, and the memory unit is compatible with a traditional logic circuit forming process, thereby improving the performance of an integrated circuit and reducing the power consumption.

An anti-fuse structure and a method for forming the same. The anti-fuse structure includes: a semiconductor substrate including an anti-fuse area and an interconnection area; a shallow trench isolation structure located inside the semiconductor substrate and isolating the anti-fuse area into at least one active area; a gate oxide located on an entire surface of the active area, the thickness of a gate oxide on an edge position of the active area is smaller than that of a gate oxide in a middle position; a gate electrode located on a surface of the gate oxide and a surface of part of the shallow trench isolation structure; and a first electrode located on a surface of the interconnection area of the semiconductor substrate, the first electrode being electrically connected with the active area. Since a thinner gate oxide is formed on an edge part of the whole active area, the area of the thinner gate oxide becomes larger, and thus a programming voltage for programming of gate oxide anti-fuse is reduced.

The invention relates to a method for obtaining a low-carbon low-alloy black skin forged-steel shaft superfine pearlite. The method comprises the steps that a decarburized layer on the surface of a low-carbon low-alloy black skin forged-steel shaft is utilized as a protective layer, the high-temperature black skin forged-steel shaft and cooling liquid perform transient heat exchange, the cooling speed is reduced through the protective layer, and accordingly a superfine pearlite structure is obtained. The method comprises the following steps that (a) the black skin forged-steel shaft is put in a heat treatment furnace and is heated to reach 30-50 DEG C above critical temperature, and heat preservation is performed for set time; (b) the shaft is discharged out of the furnace and precooled, wherein precooling is performed for set time; (c) the high-temperature black skin forged-steel shaft is put in the cooling liquid for transient cooling, and accordingly the superfine pearlite structure is obtained. By adopting the obtained superfine pearlite structure, the low-carbon low-alloy black skin forged-steel shaft can have good mechanical property, and especially the yield strength can be improved by 25-35% while the process cost is not increased.