180 results about "Size matching" patented technology

Provided is a method for managing a memory storage region used by a processor. The processor is connected to the memory that stores data accessed while a task is being executed. The memory management method including the steps of: dividing the memory area of the memory into blocks having a plurality of different sizes; selecting a block having a size matching a size of the data accessed while the task is being executed; and storing the data accessed while the task is being executed in the selected block.

A semiconductor device comprising a leadframe (903), which has first (903a) and second (903b) surfaces, a planar pad (910) of a certain size, and a plurality of non-coplanar members (913) adjoining the pad. The device further has a heat spreader (920) with first (920a) and second (920b) surfaces, a planar pad of a size matching the leadframe pad size, and contours (922), into which the leadframe members are inserted so that the first spreader pad surface touches the second leadframe pad surface across the pad size. A semiconductor chip (904) is mounted on the first leadframe pad surface. Encapsulation material (930), preferably molding compound, covers the chip, but leaves the second spreader surface uncovered.

A method, apparatus, computer medium, and other embodiments for motion estimation and compensation processing of video and image signals are described. Within a sequence of frames, block-based differences are taken between frames to exploit redundancies between pictures by taking a matchblock from the current picture and by determining a spatial offset in a corresponding reference picture which signifies a good prediction of where the current macroblock can be found. Multi-level motion estimation is performed in three stages to refine the resolution of the motion vector with reduced computational bandwidth. First, a matchblock from a reference frame is decomposed equally into several sub-matchblocks, each of which is searched in parallel over a search area decomposed into sub-blocks by a similar factor so as to determine a preliminary motion vector in the reference picture. Second, a full size matchblock is then searched over a refined search area using the preliminary motion vector to determine an intermediate motion vector, so as to refine the resolution of the preliminary motion vector. Third, fractional-pixel searching is then performed on the matchblock and the intermediate motion vector to determine a final motion vector having an even higher resolution associated with the best motion vector to be used in predicting the current macroblock. In one embodiment, a processor-based motion estimation and compensation cell array enables contemporaneous and independent loading and processing operations in parallel.