44results about How to "Shorten the signal transmission distance" patented technology

An electrical connector includes an insulating body with a main body portion in which a first receiving space is concavely formed. Spaced first terminal passages extend in a top surface of the first receiving space. A second receiving space is formed in the front end of the main body portion and connected with the first receiving space. A tongue plate extends forwards from a front end face of the main body portion and has a working surface in which spaced second terminal passages extend. The second receiving space is located above the tongue plate. First and second conductive terminals are respectively correspondingly received in the first and the second terminal passages. When a memory card is inserted into the connector, there is no other in-series disturbed signal noise for stable signal transmission; and when the memory card is inserted to its position, it cannot swing and can be connected stably.

An electro-optical module is provided, which includes: a substrate having a first surface with a groove and an opposite second surface; a plurality of support members disposed on the first surface of the substrate; at least an electro-optical element having opposite active and non-active surfaces and disposed in the groove of the substrate via the non-active surface thereof; an interposer disposed on the first surface of the substrate and the electro-optical element for electrically connecting the electro-optical element to the substrate, wherein the interposer has a through hole corresponding in position to the active surface of the electro-optical element; and a transparent plate disposed over the first surface of the substrate and the interposer through the support members and having a lens portion corresponding in position to the through hole of the interposer, thereby reducing signal losses, improving alignment precision, and achieving preferred thermal dissipation and EMI shielding effects.

A method for electrically interconnecting two printed circuit boards includes the steps of: providing a first printed circuit board (20); providing a second printed circuit board (30); providing a receiving slot (22) in one of the first and the second printed circuit boards such that the first and the second printed circuit boards are orthogonally intersected with each other; and providing at least one electrical connector (1) adjacent the receiving slot and in electrical connection with the first and the second printed circuit boards.

A piezoelectric sounder for transmitting a signal by using a sound comprises a piezoelectric diaphragm constructed by attaching a piezoelectric element to a metal sheet, a ease containing the piezoelectric diaphragm and having a resonance space defined therewithin and adapted to resonate as the piezoelectric diaphragm vibrates, a pair of terminals electrically connected to the metal sheet and piezoelectric element of the piezoelectric diaphragm, while the piezoelectric sounder has no resonance points fr, fa in a frequency range of the signal. Thus removing the resonance points fr, fa from the frequency band of the signal to be transmitted prevents the signal transmission distance from shortening at the resonance points, thereby improving the stability in communications.

The invention discloses a Fan-out Panel Level BGA package with extended pins and its manufacturing process. The second insulating layer, the second metal copper wiring, and the third insulating layer are composed. The manufacturing process is carried out according to the following steps: wafer thinning, wafer dicing, flip chip mounting, plastic packaging, film tearing and flipping, first insulation treatment, first drilling and copper wiring, second insulation Processing, the second punching and copper wiring, the third insulation treatment, the third punching and nickel-palladium-gold plating, printing and reflow soldering, cutting. The invention solves the problem of line crossover, saves cost, and improves electrical performance and product reliability.

The invention discloses an antenna integrated package structure and a fabrication method thereof. The package structure comprises a lamination structure and a multi-layer substrate, wherein the lamination structure comprises at least one chip and at least one plated via and through hole structure, the chip is buried in the lamination structure, the plated via and through hole structure passes through the lamination structure, the multi-layer substrate is laminated on the lamination structure and at least comprises a metal layer, the metal layer is arranged on one side, far away from the lamination structure, of the multi-layer substrate and at least comprises an antenna pattern, the antenna pattern is arranged above the chip, the multi-layer substrate comprises the plated via and through hole structure, the plated via and through hole structure passes through the multi-layer substrate and is connected with the plated via and through hole structure so as to electrically connect the antenna pattern and the chip. The invention also provides the fabrication method of the above antenna integrated package structure.

The invention discloses an FCQFN encapsulation part preventing solder balls from collapsing and a manufacturing process of the FCQFN encapsulation part. The encapsulation part is mainly composed of a copper lead frame, a first green paint layer, green paint grooves, chips, tin-silver-copper protruded points, a plastic packaging body, etched pins, a second green paint layer and the solder balls. The first green paint layer coats the copper lead frame and is provided with the green paint grooves, and the chips and the tin-silver-copper protruded points are adhered to the green paint grooves. The plastic packaging body wraps the upper surface of the copper lead frame, the first green paint layer, the green paint grooves, the chips and the tin-silver-copper protruded points to form an overall circuit. The etched pins are formed by the etched copper lead frame, the etched copper lead frame comprises an etching thinning area, the second green paint layer coats the inside of the etching thinning area, and the solder balls are located on the etched pins. The manufacturing process comprises the following steps of wafer thinning, wafer scribing, green paint coating of the frame, exposure development, inverse chip assembly, backflow cleaning, plastic packaging, thinning of the back face of the frame, etching and separation of the pins, green paint filling, steel mesh printing and ball mounting, cutting, packaging and delivery. According to the FCQFN encapsulation part preventing the solder balls from collapsing and the manufacturing process of the FCQFN encapsulation part, short circuit is prevented, filling performance of plastic packaging materials is improved, and therefore product reliability is promoted.