43645results about "Printed circuit aspects" patented technology

A transparent conductor including a conductive layer coated on a substrate is described. More specifically, the conductive layer comprises a network of nanowires which may be embedded in a matrix. The conductive layer is optically transparent and flexible. It can be coated or laminated onto a variety of substrates, including flexible and rigid substrates.

Circuit structures and methods of fabrication are provided for facilitating implementing a complete electronic system in a compact package. The circuit structure includes, in one embodiment, a chips-first multichip base layer with conductive structures extending therethrough. An interconnect layer is disposed over the front surface of the multichip layer and includes interconnect metallization electrically connected to contact pads of the chips and to conductive structures extending through the structural material. A redistribution layer, disposed over the back surface of the multichip layer, includes a redistribution metallization also electrically connected to conductive structures extending through the structural material. Input / output contacts are arrayed over the redistribution layer, including over the lower surfaces of at least some integrated circuit chips within the multichip layer, and are electrically connected through the redistribution metallization, conductive structures, and interconnect metallization to contact pads of the integrated circuit chips of the multichip layer.

The present invention discloses methods for depositing a material, particularly a conductive material, in cavities of a substrate and forming bonding contacts or pads thereon. An intracavity structure may be utilized in conjunction with embodiments of the present invention to provide efficient filling of diverse cavities within the substrate. Also provided are embodiments for interconnection structures using filled cavities, along with electrically conductive or reactive structures which may include capacitors fabricated within a substrate.

An LED illumination apparatus according to the present invention includes at least one connector and a lighting drive circuit. The connector is connected to an insertable and removable card-type LED illumination source, which includes multiple LEDs that have been mounted on one surface of a substrate. The lighting drive circuit is electrically connected to the card-type LED illumination source by way of the connector. The card-type LED illumination source preferably includes a metal base substrate and the multiple LEDs that have been mounted on one surface of the metal base substrate. The back surface of the metal base substrate, including no LEDs thereon, thermally contacts with a portion of the illumination apparatus. A feeder terminal to be electrically connected to the connector is provided on the surface of the metal base substrate on which the LEDs are provided.

A carrier for a semiconductor component is provided having passive components integrated in its substrate. The passive components include decoupling components, such as capacitors and resistors. A set of connections is integrated to provide a close electrical proximity to the supported components.

An interconnect apparatus for providing a communication path for data signals in a predetermined frequency band, that includes a first and a second sections of a transmission line, connected at one end to first and second data transceiving devices, respectively. A switch, such as a mechanical, electro-mechanical, electronic, electro-magnetic and electro-optical switch, having conductive / non-conductive states, is provided for connecting / disconnecting between the other ends of the first and the second sections, for providing a data communication path between the data transceiving devices while being in its conductive state a third and a fourth sections of a transmission line, each of which connected at one end to a contact of the switch and at the other end to a first and a second connector, respectively. A compensation circuitry is provided for compensating, within the frequency band, parasitic effects caused by the switch and / or cord, while the switch is in its conductive state or, while the switch is in its non-conductive state and while a connection between the first and the second connectors is provided by a cord having predetermined characteristics, such that the compensation circuitry compensates the influence of parasitic effects introduced along the communication path by the switch while being in its non-conductive state and while the cord is a part of the communication path or, by the combination of the third and a fourth sections and the connectors while the switch is in its conductive state.

Various sensors and methods of assembling sensors are described. In some embodiments, the sensor assembly includes a first end, a body portion, and a second end. The first end can include a neck portion and a connector portion and the second end can include a flap, a first component, a neck portion, and a second component. A method is also described for sensor folding. The method can include using a circuit with an attached emitter and a detector that is separated by a portion of the circuit. The method can also include folding the portion of the circuit such that a first fold is created through the emitter and folding the portion of the circuit such that a second fold is created such that the first fold and second fold form an angle.

An indicia decoding device can have an image sensor and a laser diode assembly configured to project laser light onto a substrate. When a trigger signal is received by the indicia decoding device, the device can calculate a delay and enable the laser diode assembly if a delay threshold is satisfied. The indicia decoding device, in one embodiment, can include a hand held housing and an imaging module carrying the image sensor.

A memory module includes a plurality of memory devices and a circuit. Each memory device has a corresponding load. The circuit is electrically coupled to the plurality of memory devices and is configured to be electrically coupled to a memory controller of a computer system. The circuit selectively isolates one or more of the loads of the memory devices from the computer system. The circuit comprises logic which translates between a system memory domain of the computer system and a physical memory domain of the memory module.