56results about How to "Avoid the risk of breakdown" patented technology

The invention relates to a gear burr removing technology. The technology comprises the following specific steps that 1, a burr removing device is constructed; 2, a gear is placed; 3, conducting and discharging are carried out; 4, an electrolyte is sprayed; 5, the gear is washed ultrasonically; 6, antirust treatment is carried out; and 7, the gear is naturally dried in air and delivered from storage. The technology has the following advantages that an anode terminal and a cathode terminal are utilized for conducting and discharging, the electrolyte is sprayed to the gear fast from bottom to top, the spraying speed is high, the electrolyte is sprayed in a centralized manner, and the burr removing effect is achieved; meanwhile, the burr removing effect is remarkable, the risk that the gear isbroken down is avoided, time for burr removing is short, and efficiency is high; the concentration of sodium nitrate is low, harm to the human body is avoided, corrosion to the surface of the gear isavoided, and meanwhile, the good burr removing effect can be ensured; and as the electrolyte spraying speed is high and the flow amount is large, the complex washing step in the later period is omitted, the gear only needs to be washed with clear water, the gear is washed ultrasonically, and thus greasy dirt on the surface of the gear can be decomposed and emulsified.

The invention relates to a power supply circuit of a power drive chip, comprising a starting circuit, a voltage stabilizing circuit and a power supply circuit. , a diode and a second capacitor, the capacity of the first capacitor is greater than the capacity of the second capacitor. While the external load power supply charges the first capacitor through the first resistor, the first capacitor charges the second capacitor; because the first capacitor capacity is greater than the second capacitor capacity, the two capacitors have close charging speeds, and the first capacitor The charging current formed is very small, the voltage drop generated by the third resistor is very small, the voltage value formed on the first capacitor is almost equal to the voltage value formed on the second capacitor, and the reverse voltage formed by the base terminal and the emitter terminal of the triode Very small, thereby effectively avoiding the danger of reverse breakdown voltage breakdown of the triode, reducing circuit maintenance costs, and ensuring the normal operation of the power supply line.

The invention relates to a novel cake-shaped coil with a neutral point voltage regulating section in the middle. The novel cake-shaped coil comprises a basic section and the voltage regulating section. The basic section is formed by an upper basic section and a lower basic section, wherein the upper basic section and the lower basic section are symmetrically distributed at two ends of the coil and are connected in parallel. The voltage regulating section is arranged in the middle of the coil and is connected to the tail portion of the basic section in series. The voltage regulating section partially or fully participates in running of a transformer. The novel cake-shaped coil eliminates a main empty path between a high-voltage coil and a voltage regulating coil, and improves filling rate in an iron core window. When running voltage of the transformer is lower than rated voltage, the number of turns participating in the operation and the running voltage decrease in direct proportion, and loss of the transformer is reduced. Turns of the voltage regulating section and turns of the basic section linearly and gradually increase and decrease according to geometric positions, abrupt potential difference does not exist, therefore, the coil structure is simplified, the danger of electrical breakdown between the sections is avoided, an oil channel between the sections is decreased, transverse magnetic flux leakage, load loss and axial electric power of the transformer are reduced, and the filling rate in the iron core window is improved.

The invention, which belongs to the technical field of low-light-level image intensifiers, relates to a method for measuring a cathode proximity focus distance of a super-second-generation image intensifier. A near-infrared monochromatic light with a wavelength range of from 900nm to 1000nm, preferably a range of from 950nm to 1000nm is used for measuring a cathode proximity focus distance of an image intensifier. A distance between an objective lens and a cathode casement window is adjusted, the objective lens is arranged at a photocathode film layer, and a focusing position A is measured; the objective lens is focused at an input end of a microchannel plate and a focusing position B is measured; and a difference between the position B and the position A indicates a cathode proximity focus distance of the image intensifier, so that the cathode proximity focus distance deltaz is equal to the difference between the B and the A. With the method provided by the invention, the cathode proximity focus distance of the super-second-generation image intensifier can be measured precisely and effectively and thus an image intensifier on which impact testing can not be carried out is determined, so that the risk of puncturing on the image intensifier is eliminated and thus unnecessary economic losses are avoided.

The present application provides a periodically polarized thin film substrate and a preparation method thereof. The periodically polarized thin film substrate includes a substrate (1), a buffer layer (2) and a piezoelectric single crystal layer (3) laminated in sequence, wherein , the piezoelectric single crystal layer (3) includes at least two piezoelectric single crystal sublayers (31), the polarization directions of adjacent piezoelectric single crystal sublayers (31) are opposite, obtained by bonding, the application provides The preparation method forms a periodically polarized thin film substrate by directly bonding multiple piezoelectric single crystal sublayers on the buffer layer. This method can be carried out at room temperature, and the process difficulty is low. The chemical cycle and the number of cycles can be flexibly controlled; effectively avoid the risk of breakdown caused by high voltage and the deterioration of surface quality caused by surface plating electrodes, and prevent light leakage into the substrate by setting a buffer layer, thereby reducing signal loss. The PPLN fabricated based on this substrate has completely through vertical domain walls.