48results about How to "Suppression of increase in mounting area" patented technology

According to the invention, mounting area is decreased and yield is improved by decreasing the number of elements, and a memory with less burden on peripheral circuitry and a driving method thereof are provided. The invention comprises a memory cell including a memory element in a region where a bit line and a word line cross with an insulator interposed between them, a column decoder, and a selector including a clocked inverter. An input node of the clocked inverter is connected to the bit line while an output node is connected to a data line. Among a plurality of transistors connected in series which form the clocked inverter, a gate of a P-type transistor of which source or drain is connected to a power source on the high potential side VDD and a gate of an N-type transistor of which source or drain is connected to a power source on the low potential side VSS are connected to the column decoder.

Heating elements different in heat generating timing are laminated in a stacked state, and the heating element close to a wiring substrate is allowed to function as a heat diffusion plate for another heating element.

An electronic part mounting method, a semiconductor module, and a semiconductor device, which can reduce a mounting area and a device thickness. In an electronic part mounting method for bonding an electrode formed on a substrate and an electrode formed on an electronic part to each other, the method comprises the step of bonding both the electrodes through a metal layer made up of aggregated particles of at least one kind of metal. Then, the metal particles have an average particle size of 1 to 50 nm. Preferably, the metal particles form a metal layer having a thickness of 5 to 100 μm.

A driver circuit that lowers the dependence of the loss in the wide gap semiconductor device upon the temperature is provided. A gate driver circuit for voltage driven power semiconductor switching device includes a power semiconductor switching device, a driver circuit for supplying a drive signal to a gate terminal of the switching device with reference to an emitter control terminal or a source control terminal of the switching device, and a unit for detecting a temperature of the switching device. The temperature of the power semiconductor switching device is detected, and a gate drive voltage or a gate drive resistance value is changed based on the detected temperature.

A PDP driving circuit is comprised of a power recovery unit for recovering an electric power from a capacitive load by resonance operation with PDP which is the capacitive load Cp, and reusing the recovered power. The power recovery unit includes a recovery inductor for resonating with the capacitive load, a recovery switch element for connecting the recovery capacitor to the capacitive load and recovery inductor, and forming a channel for passing resonance current, a counterflow preventive diode for blocking flow of current in the recovery switch element in reverse polarity direction, and a protective diode for forming a closed current channel including the recovery inductor and recovery switch element when the counterflow preventive diode is changed from ON state to OFF state.

The power IC includes an output transistor MO which controls a current flowing into an L load, a dynamic clamp circuit which clamps an overvoltage, and a clamp control circuit which controls the operation of the dynamic clamp circuit. The clamp control circuit activates the dynamic clamp circuit, which is normally inactive, upon detection of a back EMF by the L load.

An electronic element including an electronic element base and electrodes each of which has a first electrode having a surface composed of at least Al or an Al alloy and a second electrode composed of a metal nanoparticle sintered body and bonded to the first electrode. A bonding interface between the first electrode and the second electrode has a multilayer structure including, from the side of the first electrode to the side of the second electrode, (a) a first layer primarily composed of Al, (b) a second layer primarily composed of an Al oxide, (c) a third layer primarily composed of an alloy of Al and a constituent element of metal nanoparticles, and (d) a fourth layer primarily composed of the constituent element of the metal nanoparticles.

There is provided a light emitting device having a small area for mounting. The light emitting device of the invention includes a light emitting element having an electric signal terminal, that is driven to emit light by an electric signal given to the electric signal terminal from outside, and a semiconductor chip for driving the light emitting element, having a light emitting element drive circuit that is made of a semiconductor, outputs and applies the electric signal to the electric signal terminal. The light emitting elements are mounted on the surface of the semiconductor chip for driving the light emitting element, and a conductive path is provided for mutually connecting a plurality of light emitting elements on the surface of the semiconductor chip for driving the light emitting element.

A variable gain amplifier includes a current path control circuit which controls a path of a current flow through an amplifying transistor section, so as to control the actual size of transistors which make up the amplifying transistor section, and thereby control the gain and IIP3 (third-order Input Intercept Point). When the size W / L of the transistors is decreased or increased under constant current level maintained in a current path control circuit in the circuit, the transconductance (gain) is decreased or increased and the IIP3 is increased or decreased. According to this principle, there is provided a variable gain amplifier with a small mount area, capable of compensating for a decrease of the gain by an increase of the IIP3.

A temperature dependency of an internal clock signal generated by an internal clock generating circuit is effectively reduced. A temperature detecting circuit is provided to a variable clock generator for generating the internal clock signal and an oscillating cycle period of the variable clock generator is altered according to a detection signal of the temperature detecting circuit. A cycle of the internal clock signal is altered and a temperature dependency of the internal clock signal is effectively compensated for.

There is provided a filter including a first resonator, a second resonator in which an excitation efficiency is reduced more than the first resonator, and an inductor connected in parallel with the second resonator.

To provide a magnetic sensor that can be reduced in size and cost. Provided is a magnetic sensor which comprises: a magnetic field detection chip having a magnetic field detection element for detecting a magnetic field and an output terminal for outputting an output signal from the magnetic field detection element; and a substrate that has the magnetic field detection chip mounted thereon, and has a connection terminal for being connected to the output terminal of the magnetic field detection chip that is formed on a mount face of the substrate. An output-terminal formed face of the magnetic field detection chip is arranged not to be in parallel to the mount face of the substrate. More specifically, the output-terminal formed face of the magnetic field detection chip is arranged almost vertical to the mount face of the substrate.

A wavelength selective light cross connect device 1A is configured of a route selector 10A including route selection elements 11-1 to 11-N, wavelength selector 20A, route selector 40A including route selection elements 41-1 to 41-M and controller 50A. The route selection elements 11-1 to 11-N select routes for WDM signals of N channels inputted to input routes Rin1 to RinN, and directs the WDM signals to the wavelength selector 20A. The wavelength selector 20A performs a selection operation to (N×M) WDM signals according to their wavelength, and outputs the signals. Wavelength selection elements 40-1 to 40-M receives different outputs obtained from the respective route selection elements via the wavelength selector 20A, selects routes and outputs the signals from output routes Rout1 to RoutM.

An overcurrent detection circuit (35) that detects an overcurrent state of a transistor (2) that outputs a current to a load (25) is provided with a start-up monitoring portion (31) that distinguishes between a start-up state and a steady state, an overcurrent monitoring portion (33) that monitors an overcurrent state of the transistor (2), and an output voltage monitoring portion (34) that detects whether the output voltage to the load (25) is normal or abnormal. The overcurrent monitoring portion (31) changes an overcurrent detection level while referring to information from the start-up monitoring portion (31) and the overcurrent monitoring portion (33).

An LCD panel module includes a common boosting converter, an LCD boosting circuit, an LDO control circuit, and constant current circuits for parallel-connected LED elements and series-connected LED elements. The LCD panel module is so configured that a type-switching unit can switch over between Type 1 in which the LED elements are connected in parallel and Type 2 in which the LED elements are connected in series. The common boosting converter preliminarily boosts a battery voltage supplied from a lithium ion battery to a low voltage or a high voltage and supplies the boosted voltage to the parallel-connected LED elements or series-connected LED elements respectively. The LCD boosting circuit boosts the low voltage and supplies it to an LCD panel, while the LDO control circuit steps down the high voltage and supplies it to the LCD panel.

A load driving device includes: an output power device for driving a load; a driving IC for controlling the output power device, wherein the driving IC is electrically coupled with the output power device through a wire or a connection member; and a first electrode substrate. The output power device and the driving IC are mounted on the first electrode substrate. In this case, the output power device is controlled with high speed, and a mounting area of the output power device and the driving IC is reduced.

A three-dimensional mounting structure according to the present invention includes: a first main wiring board having a first wiring pattern on its surface and an electronic component mounted on the wiring pattern; a second main wiring board disposed facing the first main wiring board and having a second wiring pattern on its surface; and a lead frame connector disposed substantially perpendicular to the first main wiring board and the second main wiring board at an end portion of the two wiring bards, wherein the lead frame connector includes a plurality of lead wires made of an electrically conductive material and a resin portion to which the plurality of lead wires are fixed, wherein an end portion of each of the plurality of lead wires is exposed from the resin portion, and wherein at least two of the plurality of lead wires are each electrically connected to both the first wiring pattern of the first main wiring board and the second wiring pattern of the second main wiring board. Thus, there is provided a three-dimensional mounting structure that can realize high-density, multi-function mounting, allows easy testing, as well as repair and exchange of various elements and can reduce the mounting area, and a method for producing such a three-dimensional mounting structure.

An object of the present invention is a small composite antenna that is capable of operating in a plurality of different frequency bands. A first antenna 2 constituting a GPS circularly polarized loop antenna is formed on a dielectric substrate 10. A second antenna 3 constituting an ETC square patch antenna is formed on substantially the same axis as the first antenna 2. An earth pattern is formed in the underside of the dielectric substrate 10, and a recess in whose bottom face an earth pattern is formed so as to lie opposite the second antenna 3 is provided. An arc-shaped feed pattern 4 is electromagnetically coupled to the first antenna 2 so as to supply electricity thereto, whereby this antenna is made to operate as a right-handed circularly polarized antenna. Electricity is supplied by a coaxial cable to the second antenna 3 to cause same to operate as a right-handed circularly polarized antenna.

A speaker drive integrated circuit of the present invention includes: a load connection status detecting circuit configured to cause a current to flow from an external power supply to one of output terminals when an output side of an amplifying circuit is set to a high impedance state and detect whether a load connection status is normal, open, or short based on a voltage generated at the output terminal; and a transmitting terminal through which a signal indicating a detection result by the load connection status detecting circuit is output to outside.

Pairs of registers with reduced pins are disposed to overlap on front and back surfaces of a memory module. An input signal INS is transferred through the registers in series in a daisy chain fashion to avoid divergence of the input signal INS for preserved signal integrity. Each register buffers the input signal INS to memory banks disposed closely to sides of the register for reduced wiring area.

A structure of housing is to be arranged in such a way as not to involve a complication of a manufacturing process or damage to a sealing rubber, and moreover, not to involve a decrease in a mounting area of an electronic substrate, either. A transmitter includes: a casing; a sealing rubber which covers an inner surface of the casing; an electronic substrate fitted inside the sealing rubber; and an inner plate for preventing the electronic substrate from dropping off and housing a battery, wherein the inner plate, as well as having a structure which can take an aspect of a bent condition, in which it is bent with a thin-walled parting line portion as a border, or a straightened condition, in which it is in an approximately flush aspect, has one or more long holes, and has provided on one longitudinal edge of the long holes, arms of which proximal portions are swingably attached thereto, and furthermore, on the other longitudinal edge of the long holes, engagement portions which can be engaged with leading ends of the arms.

A circuit synchronizes parallel data of different timing for transfer. The synchronous data transfer circuit includes a plurality of first flip-flop circuits in which the parallel data are set by a data strobe signal, a plurality of delay circuits, and a plurality of second flip-flop circuits. By configuring the second flip-flop circuits to share generation of a delay amount, the second flip-flop circuits are utilized for data synchronization by the synchronous data transfer circuit. Thus, it becomes possible to configure the delay circuits with a remarkably reduced amount of delay elements.

Provided is a prober capable of suppressing the increase in installation area and the increase in device cost, and also improving the throughput, while maintaining the accuracy of the moving position of an alignment device shared by each of measuring units. The prober includes: a plurality of measuring units, each of which has a probe card electrically connected to a test head; a wafer chuck that holds a wafer in which a plurality of chips are formed; an alignment device which performs relative alignment between the probe card and the wafer held by the wafer chuck; a moving device which moves the alignment device among the measuring units; and a positioning and fixing device which is provided for every of the measuring units, and positions and fixes the alignment device which is moved to each of the measuring units.

A light emitting device has a semiconductor light emitting element and a multilayer chip varistor. The multilayer chip varistor has a multilayer body with a varistor portion therein, and a plurality of external electrodes disposed on an outer surface of the multilayer body. The varistor portion has a varistor layer containing ZnO as a principal component and exhibiting nonlinear voltage-current characteristics, and a plurality of internal electrodes arranged to interpose the varistor layer between them. Each of the external electrodes is connected to a corresponding internal electrode out of the plurality of internal electrodes. The semiconductor light emitting element is disposed on the multilayer chip varistor. The semiconductor light emitting element is connected to corresponding external electrodes out of the plurality of external electrodes so as to be connected in parallel to the varistor portion.

Provided is a prober capable of suppressing the increase in installation area and the increase in device cost, and also improving the throughput, while maintaining the accuracy of the moving position of an alignment device shared by each of measuring units. The prober includes: a plurality of measuring units, each of which has a probe card electrically connected to a test head; a wafer chuck that holds a wafer in which a plurality of chips are formed; an alignment device which performs relative alignment between the probe card and the wafer held by the wafer chuck; a moving device which moves the alignment device among the measuring units; and a positioning and fixing device which is provided for every of the measuring units, and positions and fixes the alignment device which is moved to each of the measuring units.

A connector mountable to a printed circuit board is disclosed including a nonconductive housing with a plurality of slots, each slot having an opposed first and second end walls with grooves in each end wall and a plurality of terminals (41). Each terminal has a longitudinal axis, a retaining base (42), a solder portion (44), a resilient contact arm (43) and an alignment tab (45). The retaining base (42) has opposed edges with each edge fitting into a respective groove in the end walls holding each terminal to the non-conductive housing. The solder portion (44) extends from the retaining base (42) adjacent to the first end wall of the slot for soldering to the printed circuit board. The resilient contact arm (43) has opposed first and second sides extending from the retaining base (42), the first side of the arm is located adjacent the second end wall of the slot. The contact arm (43) is adapted to engage with a terminal (21) from a mating connector. The resilient contact arm and the solder portion (44) are offset from each other in a direction parallel to the longitudinal axis of the terminal. A locating tab (45) is stamped from the retaining base (42) with one end adjacent the second side of the resilient contact arm so that the second side of the resilient contact arm will engage the one edge of the locating tab if a side force is placed on the resilient contact arm (43) causing it to move away from the first side wall of the slot.

A multilayer ceramic electronic component includes a body with a plurality of first and second internal electrodes alternately arranged with dielectric layers interposed therebetween. There may be M each of third and fourth external electrodes on opposing sides of the body, where M is greater than or equal to 3 and all external electrodes have different polarities than the adjacent external electrodes. There may be N via electrodes penetrating through the body, where N is greater than or equal to 3 and the via electrodes are connected to either of the first or second internal electrodes. The multilayer ceramic electronic component may achieve low equivalent series inductance (ESL) characteristics and may reduce the mounting area on the circuit board.

A relay, a relay unit and an electrical junction box are disclosed as including a plurality of relays (2A˜2D), each of which includes a pair of switch connector circuit components (5a˜5d, 6a˜6d) between which a relay switch (SW) is intervened, a pair of coil connector circuit components (7a˜7d, 8a˜8d) between which a relay coil (L) is intervened, and a plurality of electrically conductive trimmer joint portions (9a˜9j) joined between the respective switch connector circuit components (5a˜5d, 6a˜6d) and the respective coil connector circuit components (7a˜7d, 8a˜8d) and able to be cut out at suitable cutting points to provide a desired mounting circuit profiled in a selected relay circuit pattern.