302 results about "Daisy chain" patented technology

A Flash memory system is implemented in a system-in-package (SIP) enclosure, the system comprising a Flash memory controller and a plurality Flash memory devices. An SIP relates to a single package or module comprising a number of integrated circuits (chips). The Flash memory controller is configured to interface with an external system and a plurality of memory devices within the SIP. The memory devices are configured in a daisy chain cascade arrangement, controlled by the Flash memory controller through commands transmitted through the daisy chain cascade.

The present invention concerns a battery monitoring system for monitoring a plurality of batteries serially connected to form a string. The battery monitoring system includes a number of probes connected to at least a portion of the string, a daisy chain bus having a select channel for serially interconnecting the probes, the bus having other, parallel channels for data communication and power, and a system server. The probes each have a sensing module and a communication module. The sensing module senses characteristics of at least a portion of the string, such as voltage or current. The communication module receives the sensed characteristics and converts them into digital form for broadcast to the system server over the bus. The communication module of the probes have a memory for storing an address assigned to the corresponding probe upon reception of an initialization signal sent by the system server via the bus.

A heater control system that utilizes electronic temperature control at each of a number of interconnected heaters is provided for monitoring and operating heaters within a narrow temperature range. In one embodiment, a heater control system is provided that is adapted for controlling a number of heaters positioned on pipe and components of a piping system from a remote location. The heater control system includes satellite controllers mounted on each heater connected daisy chain fashion and includes a monitoring station with a user interface for allowing a user to monitor and to remotely control the operating status or temperature of each heater in the heater control system. To satisfy the user's space requirements, the size of each controller is maintained at a small form factor and a single cord is used to provide power and communications lines to and between the controllers. Each controller integrates power supply and control with electronic temperature control to minimize the use of mechanical switching and to increase the accuracy of temperature control. The temperature set point is adjustable at each controller and, in one embodiment, the temperature set point is remotely adjustable from a remote monitoring station. The operating status of each controller is displayed on the exterior of the controller's housing and in one embodiment, the operating status, such as temperature, is displayed at a base station for each line of controllers and heaters and on a user interface monitor at a monitoring station.

A communications architecture utilizes modules arranged in a daisy-chain, each module supporting multiple input and output ports. Point-to-point links are arranged so that a first output link of each of multiple modules connects to the next module in the chain, and a second output link connects to a module after it, and inputs arranged similarly, so that any single module can be by-passed in the event of malfunction. Multiple chains may be cross-linked and/or serviced by hubs or chains of hubs. Preferably, the redundant links are used in a non-degraded operating mode to provide higher bandwidth and/or reduced latency of communication. The exemplary embodiment is a memory subsystem in which the modules are buffered memory chips.

A lighting apparatus includes a body portion, a conduit coupled to the body portion, and one or more illumination components coupled to the body portion, where the one or more illumination components are in electrical communication with the conduit. A lighting apparatus kit is also disclosed. A daisy-chained lighting apparatus assembly is also disclosed.

This disclosure describes different ways to improve the operation of a device's 1149.1 TAP to where the TAP can perform at-speed Update & Capture, Shift & Capture and Back to Back Capture & Shift operations. In a first embodiment of the disclosure the at-speed operations are achieved by time division multiplexing CMD signals onto the TMS input to the TAP. The CMD signals are input to a CMD circuit that operates in conjunction with a Dual Port Router to execute the at-speed operations of a circuit. In a second embodiment of the disclosure the at-speed operations are achieved by detecting the TAP's Exit1DR state as a CMD signal that is input to the CMD circuit that operates in conjunction with a Dual Port Router to execute the at-speed operations of a circuit. In a third embodiment of the disclosure the at-speed operations are achieved by detecting the TAP's Exit1DR and PauseDR states and in response producing Capture and Update signals that are input to a Programmable Switch that operates in conjunction with a Dual Port Router to execute the at-speed operations of a circuit. In a fourth embodiment of the disclosure the at-speed operations are achieved by detecting the TAP's Exit1DR and PauseDR states and inputting these states to a Dual Port Router to control the at-speed operations of a circuit. Each of the embodiments may be augmented to include externally accessible Update and Capture input signals that can be selected to allow a tester to directly control the at-speed operations of a circuit. The improvements of the disclosure are achieved without requiring any additional IC pins beyond the 4 required TAP pins, except for examples showing use of additional data input pins (TDI or WPI signals), additional data output pins (TDO or WPO signals) or examples showing use of additional control input pins (Capture and Update signals). Devices including the TAP improvements can be operated compliantly in a daisy-chain arrangement with devices that don't include the TAP improvements.

The invention discloses a satellite channel high-dynamic time delay Doppler simulation system, relates to the technical field of satellite communication, and solves the problems of small simulation time delay and Doppler range and low change speed of an existing channel simulator. The system comprises an input unit, an FPGA control unit, an upper computer parameter control unit and an output unit.The FPGA control unit comprises a static time delay control unit, a dynamic time delay control unit and a Doppler frequency shift simulation unit; the FIFO function realized on the basis of the external DRAM memory structure can be subjected to large-range time delay; hardware adopts a PXI architecture, multi-channel expansion is realized, and a plurality of board cards are triggered in a daisy chain form. The fractional delay filter based on the least square method ensures accurate delay control in a large bandwidth range; Doppler and time delay continuous changes are supported; Doppler andtime delay joint synchronous control; a speed-adjustable control mode is updated based on the digital NCO parameters; and the satellite channel high-dynamic time delay Doppler simulation system can beexpanded into a multi-channel structure, and multiple channels can be accurately synchronized.

A memory chip suitable for use in a daisy chain of memory chips. The memory chip receives an address/command word on a first input, determines if the address command word is directed to the memory chip; if so, the memory chip accesses an array on the memory chip respondent to the address/command word. If not, the memory chip re-drives the address/command word on a first output. Write data is received as part of the address/command word or from a first data bus port. Read data is read from the array or is received from a second data bus port for subsequent re-driving on the first data bus port. A bus clock is received and is used to receive and transmit information on the first input, the first output, the first data bus port and the second data bus port.

A system includes a plurality of power supplies and a controller. The plurality of power supplies outputs power to a load. A serial bus connects the plurality of power supplies in a daisy chain. The controller is connected to first and last ones of the power supplies by the serial bus. The controller is connected to a management bus via a management bus interface. The controller monitors the plurality of power supplies via the serial bus. The controller transmits status information of the plurality of power supplies to the management bus via the management bus interface of the controller.