The invention is a kind of programmable interrupt controller, which refers to a kind of interrupt controller which can select the interrupt with the highest priority from the primary device interrupt, the salve device interrupt, the soft interrupt and the outer interrupt, and sends out interrupt application to the processor core (ARM core). The device includes a bus interface model, an interrupt sampling model, an iRQ (normal interrupt quest) logic processing model, a FIQ (fast interrupt quest) logic processing model, priority comparing model and signal blending model. The controller can solve the problem that the function is single, the configuration is inflexible, and the repeatability is bad in the current technology.