104 results about "Interrupt vector table" patented technology

In one embodiment, an interrupt controller may implement an interrupt distribution scheme for distributing interrupts among multiple processors. The scheme may take into account various processor state in determining which processor should receive a given interrupt. For example, the processor state may include whether or not the processor is in a sleep state, whether or not interrupts are enabled, whether or not the processor has responded to previous interrupts, etc. The interrupt controller may implement timeout mechanisms to detect that an interrupt is being delayed (e.g. after being offered to a processor). The interrupt may be re-evaluated at the expiration of a timeout, and potentially offered to another processor. The interrupt controller may be configured to automatically, and atomically, mask an interrupt in response to delivering an interrupt vector for the interrupt to a responding processor.

The invention discloses an optical module firmware in-application upgrading method capable of not interrupting service. Two areas are set in an optical module internal program storage area and are respectively used for storing an upgrade program and an application program, a special area is set and used for backing up an interrupt vector table of a Boot program, an upper computer communicates with an optical module, the interrupt vector table is switched, and the skip between the Boot program and the application program is realized through a program pointer. The method specifically comprises the following steps of: 1) extracting firmware contents; 2) entering a download mode and upgrading a firmware; 3) erasing the original firmware; 4) writing a new firmware; and 5) entering an application mode, wherein after data and codes are verified, the upper computer transmits a download mode exit command, the optical module firmware exits from the upgrade program and is switched to execute the new application program, and the optical module works normally. By adopting the optical module firmware in-application upgrading method capable of not interrupting service, since the switching between the application program and the upgrade program is controlled by the command which is transmitted by the upper computer and an MCU (micro control unit) is not required to be reset, the situation that the work of the optical module is interrupted is not caused.

Methods, apparatus, and systems for facilitating effective power management through dynamic reconfiguration of interrupts. Interrupt vectors are mapped to various processor cores in a multi-core processor, and interrupt workloads on the processor cores are monitored. When an interrupt workload for a given processor core is detected to fall below a threshold, the interrupt vectors are dynamically reconfigured by remapping interrupt vectors that are currently mapped to the processor core to at least one other processor core, such that there are no interrupt vectors mapped to the processor core after reconfiguration. The core is then enabled to be put in a deeper idle state. Similar operations can be applied to additional processor cores, effecting a collapsing of interrupt vectors onto fewer processor cores. In response to detecting cores emerging from idle states, reconfiguration of interrupt vectors can be performed to rebalance the assignment of the vectors across active cores by remapping a portion of the vectors to those cores.

An interrupt processing technique is provided where an interrupt message is sent to an interrupt controller of a processor in response to an interrupt request from an individual device. The interrupt message comprises a memory address and interrupt status information. The memory address is specifically allocated to the device that has issued the interrupt request. The interrupt status information indicates an interrupt status of the device. An interrupt table that is stored in the memory is updated by the interrupt controller using the interrupt status information comprised in the interrupt message. The interrupt table holds device specific interrupt statuses. Updating the interrupt table comprises addressing the memory using the memory address in the interrupt message.

A method and apparatus for configuring a microcontroller. An XML description of the microcontroller's hardware resources may be accessed. A user may select from available hardware resources and pre-defined user modules to select a configuration. Configuration information, which may include register bit patterns and microprocessor instructions, may be automatically generated. Additionally, application programming interface calls and structure, as well as interrupt vector tables may be automatically generated. Embodiments of the present invention provide improved ease of use and the ability to manage greater complexity in the configuration of configurable microcontrollers.

An interrupt processing technique is provided where an interrupt message is sent to an interrupt controller of a processor in response to an interrupt request from an individual device. The interrupt message comprises a memory address and interrupt status information. The memory address is specifically allocated to the device that has issued the interrupt request. The interrupt status information indicates an interrupt status of the device. An interrupt table that is stored in the memory is updated by the interrupt controller using the interrupt status information comprised in the interrupt message. The interrupt table holds device specific interrupt statuses. Updating the interrupt table comprises addressing the memory using the memory address in the interrupt message.

Systems, methods, and apparatus to retarget platform interrupts in a reconfigurable system. Some embodiments include identifying each processor of a multiprocessor system capable of processing Corrected Platform Error Interrupts, adding each processor capable of processing Corrected Platform Error Interrupts to a list of potential Corrected Platform Error Interrupt targets, and updating an interrupt table with a target processor for an interrupt, wherein the interrupt table is accessible by an interrupt controller to target platform interrupts. Another embodiment includes receiving a request to disable the first processor in a multiprocessor apparatus, determining if the first processor is a Corrected Platform Error Interrupt destination, and determining if the second processor is capable of processing Corrected Platform Error Interrupts. This embodiment also includes reprogramming an interrupt controller to route interrupts to the second processor instead of the first processor and disabling the first processor.

A method, system, and article of manufacture to efficiently support interrupts of a computer system. A message-based interrupt from a device of the computer system is intercepted. A fake line-based interrupt for the device corresponding to the message-based interrupt is determined, wherein an operating system (OS) of the computer system is not message-based interrupt capable. The fake line-based interrupt is issued to the OS. A query from the OS regarding the fake line-based interrupt is serviced, the query to determine if the fake line-based interrupt was from the device. An interrupt vector associated with the message-based interrupt is provided to the OS.

An apparatus which comprises two or more moderation timers associated with an interrupt vector is presented. In one embodiment, the apparatus comprises two or more interrupt vectors and moderation timers are set with different interrupt rates. An interrupt vector logic unit sends an interrupt vector if there is an interrupt event from the queue associated with a moderation timer and the moderation timer expires.

In a virtual computing machine, a system and method that dynamically patches the interrupt mechanism (in interrupt vector space) of a host computing architecture with guest mode software. Significant increases in performance are achieved without depending on the host code. A patching mechanism evaluates the operating system version, processor, and code to be patched. If patchable, low-level interfaces are created dynamically; a dispatcher is written into an unused location in vector space, and instructions copied from each interrupt vector to be patched to a guest interrupt vector. For an interrupt, the new, patched instructions branch to the dispatcher, which then branches to the appropriate patched interrupt guest code. If the processor is operating as a virtual machine, the guest interrupt code handles the interrupt, otherwise the original copied instructions are replayed, followed by execution at the original host instruction in vector space that exists after the copied and patched instructions.

The invention relates to an interrupt system realization method and a device thereof, wherein, the method comprises the steps as follows: an interrupt request is received, and the type of the interrupt request is judged; an interrupt vector table is referred to for obtaining the interrupt vector corresponding to the type of the interrupt request; and an interrupt service program corresponding to the interrupt vector is executed. The device comprises a receiving module, a reference module and an executing module. The interrupt system realization method and the device thereof realize the execution of the corresponding interrupt service program according to the type of the interrupt request by judging the type of the interrupt request, referring to the interrupt vector table, obtaining the interrupt vector corresponding to the type of the interrupt request and executing the interrupt service program corresponding to the interrupt vector, and overcomes the disadvantage that the interrupt processing manner is single, thus better optimizing the interrupt processing manner and ensuring that the resource of an interrupt system is brought into better play in the aspect of industrial control.

The invention relates to the technical field of single chip microcomputer, especially relates to a single chip microcomputer online upgrading method and system, wherein the method comprises the following steps: the single chip microcomputer initializes the upgrading variable after receiving the upgrading start command, and replies the current running area to the upgrading software of the upper computer, so that the upgrading software of the upper computer decides to generate the upgrading Bin file to be transmitted according to the current running area; The single chip microcomputer receives the upgraded Bin file and stores the upgraded Bin file in the unrunning area of the single chip microcomputer. After receiving the upgrade jump command, MCU shuts down the interrupt, copies the interrupt vector area of upgrade program to the interrupt vector area of MCU, runs the new program after the soft restart, and completes the upgrade. The invention divides the FLASH of the single chip microcomputer into an interrupt vector area, an application program A area and an application program B area. The interrupt vector area occupies small bytes, and only the interrupt vector area needs to be copied when upgrading, thereby saving the FLASH space and the program moving time. At that same time, the upgrade Bin file can be converted into region, and the online upgrade can be realized without interrupting the service.

A method, apparatus, and computer instructions for counting interrupts by type. An interrupt count is incremented when a particular type of interrupt occurs. The count may be stored in the IDT or an interrupt count table outside the IDT. The interrupt unit increments the count each time a particular type of interrupt occurs. In the event of a potential count overflow, the mechanism of the present invention provides logic necessary to notify software in order to handle the overflow.