237results about How to "Reduce interface state density" patented technology

It is a problem to provide a semiconductor device production system using a laser crystallization method capable of preventing grain boundaries from forming in a TFT channel region and further preventing conspicuous lowering in TFT mobility due to grain boundaries, on-current decrease or off-current increase. An insulation film is formed on a substrate, and a semiconductor film is formed on the insulation film. Due to this, preferentially formed is a region in the semiconductor film to be concentratedly applied by stress during crystallization with laser light. Specifically, a stripe-formed or rectangular concavo-convex is formed on the semiconductor film. Continuous-oscillation laser light is irradiated along the striped concavo-convex or along a direction of a longer or shorter axis of rectangle.

A solid-state imaging device having a light-receiving section that photoelectrically converts incident light includes an insulating film formed on a light-receiving surface of the light-receiving section and a film and having negative fixed charges formed on the insulating film. A hole accumulation layer is formed on a light-receiving surface side of the light-receiving section. A peripheral circuit section in which peripheral circuits are formed is provided on a side of the light-receiving section. The insulating film is formed between a surface of the peripheral circuit section and the film having negative fixed charges such that a distance from the surface of the peripheral circuit section to the film having negative fixed charges is larger than a distance from a surface of the light-receiving section to the film having negative fixed charges.

An embodiment of a III-nitride semiconductor device and method for making the same may include a low resistive passivation layer that permits the formation of device contacts without damage to the III-nitride material during high temperature processing. The passivation layer may be used to passivate the entire device. The passivation layer may also be provided in between contacts and active layers of the device to provide a low resistive path for current conduction. The passivation process may be used with any type of device, including FETs, rectifiers, schottky diodes and so forth, to improve breakdown voltage and prevent field crowding effects near contact junctions. The passivation layer may be activated with a low temperature anneal that does not impact the III-nitride device regarding outdiffusion.

The invention discloses an enhanced high electronic mobility transistor and a manufacturing method thereof. The transistor comprises a substrate, a channel layer located above the substrate, a barrier layer located on the channel layer, a groove located in the barrier layer; a secondary growth semiconductor epitaxial layer located on the groove, an orthotopic dielectric layer located on the secondary growth semiconductor epitaxial layer, a grid electrode located on the orthotopic dielectric layer, a source electrode located on the barrier layer and a drain electrode located on the barrier layer, wherein a two-dimensional electron gas is formed at an interface position of the barrier layer and the channel layer. By using the enhanced high electronic mobility transistor, material damages and defects caused by etching can be reduced, an interface state density of the groove and the secondary growth semiconductor epitaxial layer and an interface state density of the orthotopic dielectric layer and the secondary growth semiconductor epitaxial layer are decreased, electric leakage of the grid electrode is reduced, a breakdown voltage and power performance of the transistor are increased and a degradation effect of a dynamic conduction resistor is reduced.

The invention provides a method for manufacturing a silicon carbide semiconductor device having a small interface state density in the interface region between a gate insulating film (20) and a silicon carbide layer (11). Specifically, an epitaxially grown layer (11) is formed on a 4H-SiC substrate (10), and after that a p well region (12), a source region (13) and a p<+> contact region (15) as ion implanted layers are formed by ion implantation. Then, a gate insulating film (20) composed of a silicon oxide film is formed on the p well region (12), the source region (13) and the p<+> contact region (15) by thermal oxidation or CVD. After that, a plasma is generated by using an N2O-containing gas, which is a gas containing at least one of oxygen and nitrogen, and the gate insulating film (20) is exposed to the plasma.

A field effect semiconductor device comprising a high permittivity silicate gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate 20 having a semiconducting channel region 24 formed therein. A metal silicate gate dielectric layer 36 is formed over this substrate, followed by a conductive gate 38. Silicate layer 36 may be, e.g., hafnium silicate, such that the dielectric constant of the gate dielectric is significantly higher than the dielectric constant of silicon dioxide. However, the silicate gate dielectric may also be designed to have the advantages of silicon dioxide, e.g. high breakdown, low interface state density, and high stability. The present invention includes methods for depositing both amorphous and polycrystalline silicate layers, as well as graded composition silicate layers.