110results about How to "Raise the bias" patented technology

Use of a multilayer etching mask that includes a stud mask and a removable spacer sleeve for MTJ etching to form a bottom electrode that is wider than the rest of the MTJ pillar is described. The first embodiment of the invention described includes a top electrode and a stud mask. In the second and third embodiments the stud mask is a conductive material and also serves as the top electrode. In embodiments after the stud mask is formed a spacer sleeve is formed around it to initially increase the masking width for a phase of etching. The spacer is removed for further etching, to create step structures that are progressively transferred down into the layers forming the MTJ pillar. In one embodiment the spacer sleeve is formed by net polymer deposition during an etching phase.

A magnetron sputter reactor for sputtering deposition materials such as tantalum, tantalum nitride and copper, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and inductively coupled plasma (ICP) sputtering are promoted, either together or alternately, in the same or different chambers. Also, bottom coverage may be thinned or eliminated by ICP resputtering in one chamber and SIP in another. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. ICP is provided by one or more RF coils which inductively couple RF energy into a plasma. The combined SIP-ICP layers can act as a liner or barrier or seed or nucleation layer for hole. In addition, an RF coil may be sputtered to provide protective material during ICP resputtering. In another chamber an array of auxiliary magnets positioned along sidewalls of a magnetron sputter reactor on a side towards the wafer from the target. The magnetron preferably is a small, strong one having a stronger outer pole of a first magnetic polarity surrounding a weaker outer pole of a second magnetic polarity and rotates about the central axis of the chamber. The auxiliary magnets preferably have the first magnetic polarity to draw the unbalanced magnetic field component toward the wafer. The auxiliary magnets may be either permanent magnets or electromagnets.

The present invention provides a “collector-less” silicon-on-insulator (SOI) bipolar junction transistor (BJT) that has no impurity-doped collector. Instead, the inventive vertical SOI BJT uses a back gate-induced, minority carrier inversion layer as the intrinsic collector when it operates. In accordance with the present invention, the SOI substrate is biased such that an inversion layer is formed at the bottom of the base region serving as the collector. The advantage of such a device is its CMOS-like process. Therefore, the integration scheme can be simplified and the manufacturing cost can be significantly reduced. The present invention also provides a method of fabricating BJTs on selected areas of a very thin BOX using a conventional SOI starting wafer with a thick BOX. The reduced BOX thickness underneath the bipolar devices allows for a significantly reduced substrate bias compatible with the CMOS to be applied while maintaining the advantages of a thick BOX underneath the CMOS.

A method and apparatus for enhancing thermal stability, improving biasing and reducing damage from electrical surges in self-pinned abutted junction heads. A first self-pinned layer having a first magnetic orientation is provided, wherein the first self-pinned layer has a first end, a second end and central portion. A second self-pinned layer is formed over only the central portion of the first self-pinned layer and an interlayer is disposed between the first and second self-pinned layers. A free layer is formed in a central region over the second self-pinned layer. First and second hard bias layers are formed over the first and second ends of the first self-pinned layer respectively, the first and second hard bias layer abutting the free layer, the first and second end of the first self-pinned layer extending under the hard bias layers at the first and second ends.

Tissue modification devices, methods of using them, and devices, systems and methods of adapting them to form tissue modification devices.

A method and apparatus for enhancing thermal stability, improving biasing and reducing damage from electrical surges in self-pinned abutted junction heads. The head includes a self-pinned layer, the self-pinned layer having a first end, a second end and central portion, a free layer disposed over the central portion of the self-pinned layer in a central region and a first and second hard bias layers formed over the first and second ends of the self-pinned layer respectively, the first and second hard bias layer abutting the free layer, the first and second end of the self-pinned layer extending under the hard bias layers at the first and second ends.

A battery isolator unit is disclosed for controlling a switching means having a first contact for connection to a terminal of a first battery, a second contact for connection to a corresponding terminal of a second battery, and an actuating input for biasing a switch element of the switching means switch in a closed position. The battery isolator unit includes a sensing circuit and a switch controller. The sensing circuit periodically determines a first and second value attributable to terminal voltage values of the first battery and the second battery respectively. The switch controller is responsive to detecting a predetermined condition of the first battery and / or the second battery to provide to the actuating input a control signal having a characteristic for biasing the switch element to the closed position. The switch controller periodically determines a difference between the first and second values when the switch element is in the closed position to obtain a obtain a sequence of difference values, and controls the characteristic of the control signal according to a comparison of a present difference value with a previous difference value to modify the bias of the switch element.