31results about How to "Adjust the resistance value" patented technology

A layout structure of a source driver having a plurality of driving channels, and a method thereof are provided herein. The layout structure of the source driver includes a plurality of pads and a plurality of routings. The pads are used for making electric contact between the source driver and an external circuit. The routings are respectively coupled between the driving channels and the pads for transmitting the signal. Besides, the routings respectively includes a plurality of resistance units, and each of the resistance units is used for adjusting the resistance of the respective routing so as to minimize a variation of the driving ability between the pads.

A structure of a thermoelectric film including a thermoelectric substrate and a pair of first diamond-like carbon (DLC) layers is provided. The first DLC layers are respectively located on two opposite surfaces of the thermoelectric substrate and have electrical conductivity.

The invention discloses an MOSFET chip manufacturing process for improving grid characteristics, which comprises the following steps: removing an isolation oxide layer in a groove region, obtaining first lightly-doped polycrystalline silicon and second lightly-doped polycrystalline silicon on the peripheral side of a groove, heavily doping the lightly-doped polycrystalline silicon in the groove, obtaining first heavily-doped polycrystalline silicon, and removing the residual isolation oxide layer in a body forming region and a source region, close to the groove, of the epitaxial layer; carrying out heavy doping on part of the region of the first lightly-doped polycrystalline silicon, and obtaining second heavy-doped polycrystalline silicon; forming a dielectric layer upwards, wherein the type of the second heavy-doped polycrystalline silicon is opposite to that of the first lightly-doped polycrystalline silicon; and forming a diode by the first lightly doped polycrystalline silicon and the second heavily doped polycrystalline silicon, forming a resistor by two ends of the second lightly doped polycrystalline silicon, and connecting the diode with the resistor in parallel to be connected to the grid electrode in series. The polycrystalline silicon resistor and the polycrystalline silicon diode are integrated in the chip, so that the current flowing through the grid electrode is effectively limited, and the protection on the grid electrode is realized.

The invention relates to a static protection circuit, in particular to a static protection circuit of a liquid crystal display panel and a static protection circuit array of the liquid crystal display panel. The static protection circuit comprises a discharging unit and a delay circuit, wherein the output end of the delay circuit is connected with the input end of the discharging unit; and by means of the delay circuit, a static pulse is delayed and the pulse width of the static pulse is increased to ensure that the pulse width of the static pulse is greater than the response time of the discharging unit so that static electricity is released through the discharging unit. Through the static protection circuit, the static pulse is prevented from entering a protected circuit.

The invention discloses a modularized integrated intelligent electrical Internet of Things sensor, which relates to the technical field of Internet of Things sensors. The gas detection device includes an inner bracket, a semiconductor, a binding post, a negative lead wire, a positive lead wire, a battery one, a lead wire and a heating wire, and the smart home Internet of Things control component includes a circuit board and a Yuba temperature control component. Networked control components change the resistance value through semiconductors, and signally connect the relay with the home circuit leakage protector or the solenoid valve of the gas pipeline, so that the home circuit is disconnected and the gas is turned off through the relay control, which improves the household electricity and gas consumption. safety.

The invention discloses a MOSFET chip manufacturing method for improving gate characteristics, including forming lightly doped polysilicon on the isolation oxide layer, and removing the lightly doped polysilicon in the groove area, so as to obtain the first light Doped polysilicon and the second lightly doped polysilicon, in the source region of the epitaxial layer, heavily doped a part of the first lightly doped polysilicon to obtain the second heavily doped polysilicon, and formed a dielectric layer upwards, the second heavily doped polysilicon The type of doped polysilicon is opposite to that of the first lightly doped polysilicon, and the first lightly doped polysilicon and the second heavily doped polysilicon form a diode, and the two ends of the second lightly doped polysilicon form a resistor, the diode and the The resistors are connected in parallel and connected in series with the grid. The polysilicon resistor and polysilicon diode are integrated inside the chip, which can effectively limit the current flowing through the gate, so as to realize the protection of the gate.

The invention discloses an MOSFET chip manufacturing method for improving grid characteristics. The method comprises the following steps: forming lightly-doped polycrystalline silicon on an isolation oxide layer, removing the lightly-doped polycrystalline silicon in a groove region so as to obtain first lightly-doped polycrystalline silicon and second lightly-doped polycrystalline silicon on the peripheral side of the groove region, forming a source region on an epitaxial layer, carrying out heavy doping on a partial region of the first lightly-doped polycrystalline silicon to obtain second heavily-doped polycrystalline silicon, upwards forming a dielectric layer, enabling the type of the second heavily-doped polycrystalline silicon to be opposite to that of the first lightly-doped polycrystalline silicon, forming a diode by the first lightly-doped polycrystalline silicon and the second heavily-doped polycrystalline silicon, forming a resistor is formed by two ends of the second lightly-doped polycrystalline silicon, connecting the diode in parallel with the resistor, and connecting in series with the grid electrode. The polycrystalline silicon resistor and the polycrystalline silicon diode are integrated in the chip, so that the current flowing through the grid electrode can be effectively limited, and the grid electrode can be protected.

Disclosed are a display device and a method of manufacturing the same. The display device may include a driving transistor disposed in a display area, a test transistor disposed in a peripheral area adjacent to the display area, and a resistance line disposed in the peripheral area, electrically connected to the test transistor, and including a metal oxide.

The invention relates to a board-mode program-controlled voltage bias test circuit of a large-scale digital integrated circuit. The program-controlled voltage bias test circuit comprises a power supply module, a first numerical control potentiometer, a second numerical control potentiometer, a first relay, a second relay, a third relay, a first resistor, a second resistor, a third resistor and aninstruction control module, wherein a first control end of the power supply module is connected with an adjustable resistor end of the first numerical control potentiometer, a second control end of the power supply module is connected with an output end of the first relay, a first input end of the first relay is connected with an adjustable resistor end of the second numerical control potentiometer, and a first input end of the first relay is connected with an output end of the second relay. According to the invention, through cooperation of the power supply module, the numerical control potentiometer, the relay, the resistor and the instruction control module, automatic control of bias voltage in a large-scale digital circuit board mode bias test is realized, a large-size special instrument does not need to be carried, and thus the portability is better.

To provide a thermistor sintered body and a temperature sensor element such that a resistance value can be adjusted in a wider range while minimizing the effect on a B constant. [Solution] This thermistor sintered body comprises a sintered body which includes a Y2O3 phase as a main phase and a Y(Cr / Mn)O3 phase as a subphase. The chemical composition of Cr, Mn, Ca, Pr, and Y excluding oxygen comprises one or both of Cr: 20 mol% or less and Mn: 20 mol% or less, Ca: 1 to 15 mol%, and Pr: 0.5 to 30 mol%, the balance being unavoidable impurities and Y. In the present invention, preferably, the subphase is a Y(Cr,Mn)O3 phase or a YCrO3 phase, and Pr is soluble in the Y(Cr,Mn)O3 phase or the YCrO3 phase.

The invention discloses a thermoelectric film structure, which includes a thermoelectric substrate and a pair of first diamond-like carbon layers. The first diamond-like carbon layer is arranged on two opposite surfaces of the thermoelectric substrate and has conductivity.

A charging and discharging circuit for an electrical system, comprising: an energy-storing unit (101), an electromotor driver (102), a battery (103), and further comprising: a logic control unit (104) connected to the energy-storing unit (101) and the electromotor driver (102) via a data bus; a switch control unit (105) connected to the logic control unit (104) and the battery (103) for receiving a logic control signal sent by the logic control unit (104) and controlling the switching on and off of individual touch points in a voltage dividing unit (106); the voltage dividing unit (106) being connected to the energy-storing unit (101) and the electromotor driver (102) for receiving a switch control signal sent by the switch control unit (105) to switch off or on the individual touch points so as to adjust the resistance values of the voltage dividing resistance. By using the charging and discharging circuit for an electrical system, the resistance value of the voltage dividing resistance can be adjusted at a proper time to improve the efficiency of charging and discharging, and a high flexibility is achieved.

The present invention provides a method of producing a resistance element incorporated in a printed circuit board at an accuracy of resistance value of +-1% or less, at low cost and with a good yield while the resistance element formed by a resistor paste is incorporated. A method of producing a printed circuit board incorporating a resistance element includes: preparing a double-sided copper clad board having a first metallic foil on one face of an insulating base material thereof and a second metallic foil on the other face of the insulating base material thereof; providing at least a pair of electrodes on one of the metallic foils; printing a resistor paste between the electrodes to form a resistor; preparing a circuit board having at least one wiring layer; ; causing a layer on which the resistor paste is formed to oppose the circuit board to layer the double-sided copper clad board on the circuit board; forming openings in the first and the second metallic foils; and emitting laser through the openings to partly remove the insulating base material and the resistor paste to adjust resistance value. A conformal mask for etching may be formed on the second metallic foil to form openings in the insulating base material by etching to emit laser through the openings.

A composite nano air - sensitive material of tin dioxide base is prepared by mixing and dispersing uniformly one share of nano bar crystal particle powder of tin dioxide base in net value mole proportioning with 0.1 - o.5 share of nano ball crystal particle powder of tin dioxide base . The dissipative air sensitive element prepared by said material has both high sensitivity and proper resistance value .