Multi-layer co-sintered lamination stackable chip resistor and manufacturing method thereof

Abstract

The invention relates to a multi-layer co-sintered lamination stackable chip resistor and a manufacturing method of the multi-layer co-sintered lamination stackable chip resistor. The multi-layer co-sintered lamination stackable chip resistor comprises a ceramic substrate, a lamination stackable resistor structure body, a first terminal pole and a second terminal pole, wherein the ceramic substrate has a predetermined thickness and is formed by superposing a plurality of layers of ceramic membranes and attaching ceramic slurry containing a solvent, an adhesive and a dispersant to the surface of a bearing membrane, the lamination stackable resistor structure body is superposed on the ceramic substrate and comprises a plurality of layers of bearing membranes and a plurality of layers of resistive layers which are formed on the surfaces of the bearing membranes one by one, the resistive layers are parallel to one another and superposed in the vertical direction to separate a predetermined spacing, and the lamination stackable resistor structure body and the ceramic substrate are superposed and then sintered in a kiln at a predetermined sintering temperature and sintering time to finalize the design of the lamination stackable resistor structure body and the ceramic substrate by sintering.

Description

technical field [0001] The invention relates to a chip resistor, in particular to a multi-layer co-fired stacked chip resistor and a manufacturing method thereof. Background technique [0002] In the past, due to the factors of cost and characteristics, passive components could not be fully integrated into the integrated circuit, but had to be realized by means of external connection, which easily caused disadvantages such as low reliability, high production cost and difficulty in shrinking the substrate area, so there appeared The technology of multi-layer co-firing is used to solve the above-mentioned problems. Its connotation is mainly based on an oxide material in a high-temperature, oxygen-containing manufacturing environment, on the oxide ceramic layer made of insulating ceramic materials, using oxide electrodes instead of metal electrodes to prepare laminated or single-layer oxide ceramic components . [0003] The multi-layer co-firing technology not only makes the ...

AI Technical Summary

Problems solved by technology

[0005] However, the above-mentioned manufacturing method for making resistors is arranged for general single-layer resistors, and the same method for making stacked resistors is just to repeat the same method to extend its functionality. The process is not only complicated and locks Broken and did not make the most efficient use of the multi-layer co-firing technology

Images